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Patent US3609411A successfully refreshed from Google Patents.
US3609411A
Expired / Lapsed
US
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Mosfet level detector
Assignee: Raytheon Co
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Filing: 1970-07-06
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Granted: 1971-09-28
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Expires: 1990-07-06
Abstract
Abstract A metal oxide semiconductor field effect transistor (MOSFET) circuit of a type that can be constructed on a single semiconductor substrate. The circuit detects which of three possible conditions is applied to a single input. The circuit will provide a two-bit digital output signal indicative of the input condition. The circuit includes two MOSFET inverters and a MOSFET resistor divider network.
Inventors
- 👤 Stephen P F Ma
- 👤 Thomas J Kosco
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 16:52
CPC Classifications
H; H03; H03M; H03M7/00; G; G11; G11C; G11C11/00; G11C11/56; G11C11/5621; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/09425
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
208 words
A circuit of the type that can be constructed on a monolithic semiconductor substrate by metal oxide semiconductor field effect transistor techniques, said circuit being coupled to receive a plurality of input signals, each of which may have two possible voltage conditions and an open circuit condition for providing a plurality of digital output signals, said circuit comprising: a MOSFET gate having a plurality of inputs, each coupled to receive an individual one of said plurality of input signals for providing an output signal of a first level when any one of the plurality of input signals has an open circuit condition and of a second level when none of the plurality of input signals has an open circuit condition; a plurality of MOS-field-controlled resistor voltage divider networks, each coupled to receive an individual one of said plurality of input signals for providing a voltage signal corresponding to the input signal condition; a plurality of MOSFET inverters, each coupled to receive the voltage signal from an individual one of said plurality of MOS-field-controlled resistor voltage divider networks for providing a digital output signal of a first level in response to the first input signal condition and of a second level in response to the second input signal condition.
Claim 2
Dependent Claim
324 words
A circuit of the type that can be constructed on a monolithic semiconductor substrate by metal oxide semiconductor field effect transistor techniques, said circuit having an input terminal, a first output terminal and a second output terminal and being responsive to a first supply voltage, a second supply voltage, a third supply voltage and an input which may have three possible signal conditions for providing a first and a second digital output signal, said circuit comprising: a first MOSFET having a first signal terminal coupled to the first supply voltage, a second signal terminal, and a gate terminal coupled to the input terminal, said first MOSFET conducting when its gate terminal is at a predetermined voltage level; a first MOS-field-controlled resistor having a first signal terminal coupled to the second signal terminal of said first MOSFET and to the first output terminal, a second signal terminal coupled to the second supply voltage, and a gate terminal coupled to the third supply voltage; a second MOSFET having a first signal terminal coupled to the first supply voltage , a second signal terminal, and a gate terminal, said second MOSFET conducting when its gate terminal is at a predetermined voltage level; a second MOS-field-controlled resistor having a first signal terminal coupled to the second signal terminal of said second MOSFET and to the second output terminal, a second signal terminal coupled to the second supply voltage, and a gate terminal coupled to the third supply voltage; a third MOS-field-controlled resistor having a first signal terminal coupled to the first supply voltage, a second signal terminal coupled to the gate terminal of said second MOSFET, and a gate terminal coupled to the third supply voltage; and a fourth MOS-field-controlled resistor having a first signal terminal coupled to the second signal terminal of said third MOS field controlled resistor, a second signal terminal coupled to the input terminal, and a gate terminal coupled to the third supply voltage.
Claim 3
Dependent Claim
33 words
A circuit as claimed in claim 3 wherein the second supply voltage is more negative than the first supply voltage and the third supply voltage is more negative than the second supply voltage.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-09-27 | 1975-03-29 | 1975-09-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-09-27 | 1979-03-29 | 1979-09-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-09-27 | 1983-03-29 | 1983-09-28 | $7700.00 | Window Closed / Lapsed |