Patent US3609393A successfully refreshed from Google Patents.
US3609393A
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US
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Bidirectional dynamic shift register
Assignee: International Business Machines Corp
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Filing: 1969-06-30
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Granted: 1971-09-28
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Expires: 1989-06-30
Abstract
Abstract A bidirectional dynamic shift register using MOSFET''s. Each stage of the shift register contains sections having storage elements for retention of data. Bidirectional means interconnect the sections and also adjacent stages. The bidirectional means controls the direction of flow of data by control of the status of any storage element in accordance with the status of the preceding storage element. That is, the state of the transferee storage element is determined by the state of the transferor storage element. Overlapping or nonoverlapping clock pulses can be used, as well as any number of clock phases.
Inventors
- 👤 Ying L Yao
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 07:27
CPC Classifications
G; G11; G11C; G11C19/00; G11C19/18; G11C19/182; G11C19/184
Claims Analysis
Total Claims: 30
Claim 1
Independent Claim
246 words
A dynamic shift register for shifting data in two directions, comprising: a plurality of interconnected stages having means for storage of data therein, each stage being comprised of field effect devices, said stages having means for receiving data impulses from the left-hand adjacent stage and means for receiving data impulses from the right-hand adjacent stage; left shift means comprised of field effect devices connected between said stages for transferring data from each stage to its left-hand adjacent stage, said left shift means having inputs for receiving data impulses stored on said stage for receiving control pulses applied thereto for regulation of data impulses to be shifted from each stage to its adjacent lefthand stage; right shift means comprised of field effect devices connected between said stages for transferring data from each stage to its right-hand adjacent stage, said right shift means having inputs for receiving data stored on said stage for receiving control pulses applied thereto for regulation of data impulses to be shifted from each stage to its adjacent right-hand stage; control means for applying clock pulses to said right and left shift means and for writing data impulses into said stages during application of said control pulses, wherein said shift means provides a conductive path for removal of data impulses from a stage to which data is to be transferred in response to the coincident application of a clock pulse and a data impulse from another stage from which data is to be transferred.
Claim 2
Dependent Claim
246 words
A dynamic shift register for shifting data in two directions, comprising: a plurality of interconnected stages having means for storage of data therein, each stage being comprised of field effect devices, said stages having means for receiving data impulses from the left-hand adjacent stage and means for receiving data impulses from the right-hand adjacent stage; left shift means comprised of field effect devices connected between said stages for transferring data from each stage to its left-hand adjacent stage, said left shift means having inputs for receiving data impulses stored on said stage for receiving control pulses applied thereto for regulation of data impulses to be shifted from each stage to its adjacent lefthand stage; right shift means comprised of field effect devices connected between said stages for transferring data from each stage to its right-hand adjacent stage, said right shift means having inputs for receiving data stored on said stage for receiving control pulses applied thereto for regulation of data impulses to be shifted from each stage to its adjacent right-hand stage; control means for applying clock pulses to said right and left shift means and for writing data impulses into said stages during application of said control pulses, wherein said shift means provides a conductive path for removal of data impulses from a stage to which data is to be transferred in response to the coincident application of a clock pulse and a data impulse from another stage from which data is to be transferred.
Claim 3
Dependent Claim
56 words
The register of claim 1, wherein said means for storage is a capacitance associated with said field effect devices and each said shift means comprises a circuit path for selectively discharging said capacitance in response to the coincident input of clock pulses and data impulses from a preceding stage from which data is to be shifted.
Claim 4
Dependent Claim
40 words
The register of claim 2, wherein each said circuit path is comprised of field effect devices having gate electrodes, said clock pulses and said data impulses from the preceding stage being applied to said gate electrodes during said shifting operation.
Claim 5
Dependent Claim
68 words
The register of claim 1, wherein each said capacitance is connected to said control means for selective application of clock pulses thereto, each said capacitance being connected to adjacent left and right capacitances by said shifting means, said shifting means being comprised of two field effect devices one of which is responsive to said clock pulses while the other is responsive to the voltage on an adjacent capacitance.
Claim 6
Dependent Claim
159 words
A bidirectional shift register, comprising: a plurality of bit storage positions, each position comprising: two groups of field effect devices, each group including a first field effect device capable of storing a signal on the gate thereof due mainly to the gate-substrate capacitance of said first device; means connected each said first field effect device to the other group in said bit position; said field effect deviCes in each group being connected serially to said capacitances, said serial connections providing discharge paths for the signal on said capacitances in response to the simultaneous input of control pulses and signal voltages from adjacent capacitances applied to the gate electrodes of said field effect devices in said serial connections; means for connecting each said group to the adjacent bit position; means for applying control pulses to the field effect devices in each said group; voltage means for selectively applying voltage signals to the gate electrodes of said first field effect devices.
Claim 7
Dependent Claim
159 words
A bidirectional shift register, comprising: a plurality of bit storage positions, each position comprising: two groups of field effect devices, each group including a first field effect device capable of storing a signal on the gate thereof due mainly to the gate-substrate capacitance of said first device; means connected each said first field effect device to the other group in said bit position; said field effect deviCes in each group being connected serially to said capacitances, said serial connections providing discharge paths for the signal on said capacitances in response to the simultaneous input of control pulses and signal voltages from adjacent capacitances applied to the gate electrodes of said field effect devices in said serial connections; means for connecting each said group to the adjacent bit position; means for applying control pulses to the field effect devices in each said group; voltage means for selectively applying voltage signals to the gate electrodes of said first field effect devices.
Claim 8
Dependent Claim
51 words
The register of claim 5, wherein said control means applies a sequence of control pulses to field effect devices in each bit position, said control pulses writing data bits into each bit storage position in accordance with the data state of a bit position from which data is to be transferred.
Claim 9
Dependent Claim
189 words
A bidirectional shift register circuit, comprising: a plurality of capacitances for storage of voltage pulses thereon; means for applying voltage pulses to said capacitances; at least two discharge paths for the voltages on each capacitance, said discharge paths being comprised of field effect devices connected in series, a first field effect device in each said path having its gate electrode connected to a capacitance from which data is to be shifted and a second field effect device in said path having a gate electrode to which control pulses are applied; control means connected to the gate electrodes of said second field effect devices in each said discharge path for providing control pulses to said second field effect devices, each said discharge path being rendered conductive by the application of a control pulse to said second field effect device and the coincident application to the gate electrode of said first field effect device of a voltage on a capacitance from which data is to be shifted, there being discharge paths for each capacitance which are selectively rendered conductive in response to the voltage state of at least two other capacitances.
Claim 10
Dependent Claim
189 words
A bidirectional shift register circuit, comprising: a plurality of capacitances for storage of voltage pulses thereon; means for applying voltage pulses to said capacitances; at least two discharge paths for the voltages on each capacitance, said discharge paths being comprised of field effect devices connected in series, a first field effect device in each said path having its gate electrode connected to a capacitance from which data is to be shifted and a second field effect device in said path having a gate electrode to which control pulses are applied; control means connected to the gate electrodes of said second field effect devices in each said discharge path for providing control pulses to said second field effect devices, each said discharge path being rendered conductive by the application of a control pulse to said second field effect device and the coincident application to the gate electrode of said first field effect device of a voltage on a capacitance from which data is to be shifted, there being discharge paths for each capacitance which are selectively rendered conductive in response to the voltage state of at least two other capacitances.
Claim 11
Dependent Claim
25 words
The circuit of claim 7, wherein each said capacitance arises mainly from the interelectrode capacitance of a field effect device in each said discharge path.
Claim 12
Dependent Claim
48 words
The circuit of claim 8, wherein the discharge paths for any capacitance are connected in parallel and are rendered conductive by the application of different control pulses and voltages from different other capacitances, said discharge paths being used for shifting data in opposite directions from each said capacitance.
Claim 13
Dependent Claim
149 words
An electric storage circuit, comprising: first and second sections, each of which can store data therein, each said section being comprised of: first and second field effect devices connected in series, each said first field effect device being capable of storing data as voltage pulses on its gate electrode; third and fourth field effect devices connected in series, said third field effect device being capable of storing data as voltage pulses on its gate electrode; a voltage source for applying voltage pulses to the gate electrodes of said first and third field effect devices; means selectively connecting said first and third field effect devices to said voltage source; control means for applying clock pulses to the gate electrodes of said second and fourth field effect devices to render said devices conductive, said control means producing clock pulses coincidentally with the application of said voltage pulses from said voltage source.
Claim 14
Dependent Claim
149 words
An electric storage circuit, comprising: first and second sections, each of which can store data therein, each said section being comprised of: first and second field effect devices connected in series, each said first field effect device being capable of storing data as voltage pulses on its gate electrode; third and fourth field effect devices connected in series, said third field effect device being capable of storing data as voltage pulses on its gate electrode; a voltage source for applying voltage pulses to the gate electrodes of said first and third field effect devices; means selectively connecting said first and third field effect devices to said voltage source; control means for applying clock pulses to the gate electrodes of said second and fourth field effect devices to render said devices conductive, said control means producing clock pulses coincidentally with the application of said voltage pulses from said voltage source.
Claim 15
Dependent Claim
53 words
The circuit of claim 10, wherein said means for selectively connecting said first and third field effect devices to said voltage source comprises further field effect devices connected in series to said first and third field effect devices, respectively, said further field effect devices having their gate electrodes connected to said voltage source.
Claim 16
Dependent Claim
30 words
The circuit of claim 11, wherein said first and second sections are interconnecteD, the gate electrodes of said first and third field effect devices being connected to said voltage source.
Claim 17
Dependent Claim
44 words
The circuit of claim 11, further including an input terminal connected to the gate electrode of said third field effect device in said first section, and an output terminal connected to the gate electrode of the first field effect device in said first section.
Claim 18
Dependent Claim
54 words
The circuit of claim 12, wherein said first and second and said third and fourth field effect devices in each section are connected together to form a series connected loop, each said loop being connected to said voltage source and to the gate electrode of said first field effect device in said other section.
Claim 19
Dependent Claim
39 words
The circuit of claim 10, where said voltage source applies time-spaced voltage pulses to said first and third field effect devices, said voltage pulses being coincident in time with selected ones of said clock pulses from said control means.
Claim 20
Dependent Claim
235 words
A bidirectional shift register circuit, comprising: a plurality of stages for storage of data therein, each stage being comprised of field effect devices; a first storage field effect device in each stage being capable of storing data as voltages on its gate electrode; a second storage field effect device in each stage being capable of storing data as voltage pulses on its gate electrode, the data state of said second field effect device being the data state of said stage; first discharge paths connected to said first storage field effect devices and to said second storage field effect device, said first discharge paths having a control input from a storage field effect device in said stage and a control input on which clock pulses are applied, the coincident application of said control inputs rendering said paths conductive; second discharge paths connected to said first storage field effect device and to said second storage field effect device, each said second discharge path having a control input from a storage field effect device in another stage and a control input on which clock pulses are applied, the coincident application of said control inputs to said second discharge paths rendering said second paths conductive; control means for applying said clock pulses to said discharge paths; voltage means for selectively applying voltage pulses to the gates of said first and second storage field effect devices for establishing data thereon.
Claim 21
Dependent Claim
235 words
A bidirectional shift register circuit, comprising: a plurality of stages for storage of data therein, each stage being comprised of field effect devices; a first storage field effect device in each stage being capable of storing data as voltages on its gate electrode; a second storage field effect device in each stage being capable of storing data as voltage pulses on its gate electrode, the data state of said second field effect device being the data state of said stage; first discharge paths connected to said first storage field effect devices and to said second storage field effect device, said first discharge paths having a control input from a storage field effect device in said stage and a control input on which clock pulses are applied, the coincident application of said control inputs rendering said paths conductive; second discharge paths connected to said first storage field effect device and to said second storage field effect device, each said second discharge path having a control input from a storage field effect device in another stage and a control input on which clock pulses are applied, the coincident application of said control inputs to said second discharge paths rendering said second paths conductive; control means for applying said clock pulses to said discharge paths; voltage means for selectively applying voltage pulses to the gates of said first and second storage field effect devices for establishing data thereon.
Claim 22
Dependent Claim
34 words
The circuit of claim 16, wherein said discharge paths are comprised of field effect devices arranged in series, the gate electrodes of said field effect devices being the control inputs to said discharge paths.
Claim 23
Dependent Claim
21 words
The circuit of claim 17, including means comprising field effect devices for selectively connecting said voltage means to said storage devices.
Claim 24
Dependent Claim
24 words
The circuit of claim 17, where said discharge paths are connected in parallel to the gate electrode of each said storage field effect device.
Claim 25
Dependent Claim
151 words
A bidirectional shift register, comprising: a plurality of interconnected stages each of which is capable of storing data, each said stage comprising: first and second series arrangements of field effect devices, each said series arrangement having a storage field effect device capable of storing voltage pulses on its gate electrode, said first and second series arrangements being cross-coupled to one another; third and fourth series arrangements of field effect devices, said third arrangement being connected to one of said storage field effect device in said stage and said fourth series arrangement being connected to the other said storage field effect device in said stage, said third and fourth series arrangements being also connected to storage field effect devices in other stages; voltage means for applying voltage pulses to the gate electrodes of said storage devices in each stage; control means for applying clock pulses to said series arrangements in each stage.
Claim 26
Dependent Claim
151 words
A bidirectional shift register, comprising: a plurality of interconnected stages each of which is capable of storing data, each said stage comprising: first and second series arrangements of field effect devices, each said series arrangement having a storage field effect device capable of storing voltage pulses on its gate electrode, said first and second series arrangements being cross-coupled to one another; third and fourth series arrangements of field effect devices, said third arrangement being connected to one of said storage field effect device in said stage and said fourth series arrangement being connected to the other said storage field effect device in said stage, said third and fourth series arrangements being also connected to storage field effect devices in other stages; voltage means for applying voltage pulses to the gate electrodes of said storage devices in each stage; control means for applying clock pulses to said series arrangements in each stage.
Claim 27
Dependent Claim
29 words
The circuit of claim 20, where said voltage means includes another field effect device for selectively connecting said voltage means to said storage field effect devices in each stage.
Claim 28
Dependent Claim
43 words
The circuit of claim 20, where said field effect devices in each series arrangements having gate electrodes as control inputs, the gate electrode of the storage field effect device in each series arrangement being connected to a terminal of said cross-coupled series arrangements.
Claim 29
Dependent Claim
38 words
The circuit of claim 22, wherein there are two field effect devices in each series arrangement, one of which is connected to said control means for receipt of clock pulses on its gate electrode for shifting of data.
Claim 30
Dependent Claim
67 words
The circuit of claim 23, where said first and second series arrangements have control inputs for receiving clock pulses from said control means and control inputs for receiving data on the gate electrode of a storage field effect device in said stage, said third and fourth series arrangements being comprised of field effect devices having their gate electrodes connected to storage field effect devices in adjacent stages.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-09-27 | 1975-03-29 | 1975-09-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-09-27 | 1979-03-29 | 1979-09-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-09-27 | 1983-03-29 | 1983-09-28 | $7700.00 | Window Closed / Lapsed |