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US3607468A
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Method of forming shallow junction semiconductor devices
Assignee: International Business Machines Corp
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Filing: 1968-10-07
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Granted: 1971-09-21
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Expires: 1988-10-07
Abstract
Abstract A method for making a high-performance NPN silicon semiconductor device which has an arsenic emitter which gives a substantial improvement in transistor speed and current gain over similar phosphorous emitters. Arsenic atoms in the emitter region tend to squeeze the P-type impurity, such as boron in the base into a narrow base layer. For the same integrated base doping, a much narrower base can be obtained with arsenic-doped emitters than with phosphorous-doped emitters.
Inventors
- 👤 Joseph J F Chang
- 👤 Madhukar B Vora
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 20:09
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/60; A; A47; A47L; A47L15/00; A47L15/42; G; G01; G01D; G01D5/00; G01D5/12; G01D5/244; H10D10/00; H10D99/00; H10P; H10P30/00; H10P30/20; H10P32/00; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/04; Y10S148/085; Y10S148/151; Y10S148/157
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
52 words
The method of forming a semiconductor PN device of claim 1 wherein said device formed is an NPN device, said diffusing step formed the emitter-base junction of said device, the semiconductor is silicon, said N-type impurity is arsenic and said P-type impurity is taken from the group consisting of boron and gallium.
Claim 2
Dependent Claim
23 words
The method of forming a semiconductor PN device of claim 2 wherein said phospho-silicate glass coating, is greater than about 700 A. thick.
Claim 3
Dependent Claim
43 words
The method of forming a semiconductor PN device of claim 2, wherein said phospho-silicate glass coating has a thickness between about 1,000 A. and 2,000 A. and said N-type diffusing step is accomplished without the formation of substantially any silicon oxide surface buildup.
Claim 4
Dependent Claim
20 words
The method of forming a semiconductor PN device of claim 3 and further comprising diffusing gold into said semiconductor device.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-09-20 | 1975-03-22 | 1975-09-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-09-20 | 1979-03-22 | 1979-09-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-09-20 | 1983-03-22 | 1983-09-21 | $7700.00 | Window Closed / Lapsed |