Successive approximation analog-to-digital converters

Claim 2

In combination, a successive approximation analog-to-digital converter including, means for generating a comparison signal through the process of successive approximation, comparison means for comparing the value of the generated comparison signal with the value of a received input signal and providing a difference signal representing a difference in value therebetween, logic means responsive to the difference signal to control the comparison signal generating means until said process of successive approximation is completed; a second analog-to-digital converted coupled to said comparison means, start means controlled by said logic means for rendering the second analogto-digital converter operative to generate a time-varying signal when said process of successive approximation is completed, means for feeding back the time-varying signal to said comparison means so as to reduce the value of the difference signal, and means for terminating the feeding back of the time-varying signal when the difference signal is reduced to a predetermined value.

Claim 3

The combination as claimed in claim 1, wherein the time-varying signal is a ramp voltage.

Claim 4

The combination as claimed in claim 1, which further comprises, register means coupled to said logic means for providing a first digital representation of the value of said input signal as determined by said process of successive approximation, said second analog-to-digital converter providing a second digital representation of the time-varying signal and which further comprises, means for applying the second digital representation to said register means to modify said first digital representation so as to account for said time-varying signal.

Claim 5

The combination as claimed in claim 1, wherein the second analog-to-digital converter includes a source of pulses, and means coupled to said source for storing pulses received therefrom from the operation of the start means until the operation of the terminating means.

Claim 6

In combination, a successive approximation analog-to-digital converter comprising, means for generating by the procesS of successive approximation a comparison signal, comparison means for receiving and comparing the comparison signal and an input signal under measurement and providing a difference signal representative of the difference in magnitude therebetween, logic means responsive to the difference signal to control the comparison signal generating means until the successive approximation process is completed, a register coupled to said logic means for providing a digital representation of the magnitude of the successively approximated input signal; a second analog-to-digital converter coupled to receive difference signals from the comparison means, start means responsive to the logic means for initiating the operation of the second analog-to-digital converter when the said successive approximation process is completed, the second analog-to-digital including means for generating pulses and a ramp signal proportional to the number of pulses generated, means for feeding back the ramp signal to the said comparison means for reducing the magnitude of said difference signal to a predetermined value, means for terminating the ramp signal when said difference signal is reduced to said predetermined digital value, and means for applying pulses to said register in accordance with said generated pulses to correspondingly change the digital output thereof.

Claim 7

In combination, a successive approximation analog-to-digital converter comprising, means for generating by the procesS of successive approximation a comparison signal, comparison means for receiving and comparing the comparison signal and an input signal under measurement and providing a difference signal representative of the difference in magnitude therebetween, logic means responsive to the difference signal to control the comparison signal generating means until the successive approximation process is completed, a register coupled to said logic means for providing a digital representation of the magnitude of the successively approximated input signal; a second analog-to-digital converter coupled to receive difference signals from the comparison means, start means responsive to the logic means for initiating the operation of the second analog-to-digital converter when the said successive approximation process is completed, the second analog-to-digital including means for generating pulses and a ramp signal proportional to the number of pulses generated, means for feeding back the ramp signal to the said comparison means for reducing the magnitude of said difference signal to a predetermined value, means for terminating the ramp signal when said difference signal is reduced to said predetermined digital value, and means for applying pulses to said register in accordance with said generated pulses to correspondingly change the digital output thereof.