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Patent US3603886A successfully refreshed from Google Patents.
US3603886A
Expired / Lapsed
US
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Noise rejecting signal filter
Assignee: Individual
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Filing: 1966-01-04
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Granted: 1971-09-07
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Expires: 1986-01-04
Abstract
Abstract A noise rejecting network for radio signals in which the signal is delayed by a multiple of the carrier wave half-period and applied along with the undelayed signal to an AND gate which produces an output only when the instantaneous polarities of the two inputs have a predetermined relationship and in which the output does not exceed the lesser instantaneous signal magnitude. A band-pass filter designed to pass only the signal frequencies is coupled to the output of the gate circuit. The use of a plurality of delays of different multiples of a half-period with additional inputs to the AND gate increases the noise rejection.
Inventors
- 👤 Gene M Norrs
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 07:45
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/06; H04B1/10
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
128 words
A noise rejecting circuit for an amplitude modulated high frequency signal comprising: an AND gate having two input circuits and an output circuit, said AND gate producing an output voltage only in the presence of two input voltages of a predetermined polarity relationship and limiting said output voltage to the lesser of the two input voltages; means producing a delay equal to a multiple of the half-period of said high frequency signal; means applying said signal directly to one input of said gate and through said delay means to the other input of said gate; and a filter passing only said high frequency signal and its sidebands coupled to the output circuit of said gate, the output of said filter constituting the output of said noise rejecting circuit.
Claim 2
Dependent Claim
128 words
A noise rejecting circuit for an amplitude modulated high frequency signal comprising: an AND gate having two input circuits and an output circuit, said AND gate producing an output voltage only in the presence of two input voltages of a predetermined polarity relationship and limiting said output voltage to the lesser of the two input voltages; means producing a delay equal to a multiple of the half-period of said high frequency signal; means applying said signal directly to one input of said gate and through said delay means to the other input of said gate; and a filter passing only said high frequency signal and its sidebands coupled to the output circuit of said gate, the output of said filter constituting the output of said noise rejecting circuit.
Claim 3
Dependent Claim
31 words
Apparatus as claimed in claim 1 in which said predetermined polarity relationship is that said input voltages are of the same polarity and in which said multiple is an even number.
Claim 4
Dependent Claim
187 words
Apparatus as claimed in claim 2 in which said AND gate comprises means establishing first and second points having direct potentials of opposite polarities relative to a point of reference potential; two diodes having one pair of like electrodes connected in common; a resistor connected between said first potential point and said common electrodes; a resistor connected between the other electrode of each diode and said second potential point; said diodes being poled in the direction of current flow between said first and second points; a pair of input circuits, one connected between the said other electrode of one of said diodes and said point of reference potential and the other connected between the said other electrode of the other of said diodes and said point of reference potential; an output circuit connected between the said common electrodes and said point of reference potential; and clamping means connected between said common electrodes and said point of reference potential for preventing said common electrodes from assuming a potential relative to said reference potential point having the polarity of said second potential point relative to said reference potential point.
Claim 5
Dependent Claim
157 words
A noise rejecting circuit for an amplitude modulated high frequency signal, comprising: a plurality of delay means producing delays that are different multiples of the half-period of said high frequency signal; an AND gate having one more input circuit than there are delay means and an output circuit, said AND gate producing an output voltage only in the presence of simultaneous input voltages of a predetermined polarity relationship on all its input circuits and limiting said output voltage to the least of said input voltages; means for applying Said high frequency signal directly to one of said gate input circuits and to said delay means in parallel; means for applying the delayed signals from said delay means to the remaining inputs of said gate; and a filter passing only said high frequency signal and its sidebands coupled to the output circuit of said gate, the output of said filter constituting the output of said noise rejecting circuit.
Claim 6
Dependent Claim
157 words
A noise rejecting circuit for an amplitude modulated high frequency signal, comprising: a plurality of delay means producing delays that are different multiples of the half-period of said high frequency signal; an AND gate having one more input circuit than there are delay means and an output circuit, said AND gate producing an output voltage only in the presence of simultaneous input voltages of a predetermined polarity relationship on all its input circuits and limiting said output voltage to the least of said input voltages; means for applying Said high frequency signal directly to one of said gate input circuits and to said delay means in parallel; means for applying the delayed signals from said delay means to the remaining inputs of said gate; and a filter passing only said high frequency signal and its sidebands coupled to the output circuit of said gate, the output of said filter constituting the output of said noise rejecting circuit.
Claim 7
Independent Claim
96 words
The method of resolving a radio signal of constant carrier frequency in the presence of noise, comprising: delaying said signal by a multiple of the carrier half-period; comparing the instantaneous magnitudes and the instantaneous polarities of the delayed and the undelayed signals and producing, only when the polarities have a predetermined relationship, an output signal of instantaneous magnitude not exceeding the lesser of the instantaneous magnitudes of the delayed and undelayed signals; and selecting from said output signal only signals of those frequencies lying within a frequency band just wide enough to include said radio signal.
Claim 8
Independent Claim
96 words
The method of resolving a radio signal of constant carrier frequency in the presence of noise, comprising: delaying said signal by a multiple of the carrier half-period; comparing the instantaneous magnitudes and the instantaneous polarities of the delayed and the undelayed signals and producing, only when the polarities have a predetermined relationship, an output signal of instantaneous magnitude not exceeding the lesser of the instantaneous magnitudes of the delayed and undelayed signals; and selecting from said output signal only signals of those frequencies lying within a frequency band just wide enough to include said radio signal.
References Cited (Backward Citations)
US3296581A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-09-06 | 1975-03-08 | 1975-09-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-09-06 | 1979-03-08 | 1979-09-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-09-06 | 1983-03-08 | 1983-09-07 | $7700.00 | Window Closed / Lapsed |