Patent US3600696A successfully refreshed from Google Patents.
US3600696A
Expired / Lapsed
US
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Complementary paired transistor circuit arrangements
Assignee: Kearfott Guidance and Navigation Corp
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Filing: 1969-08-08
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Granted: 1971-08-17
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Expires: 1989-08-08
Abstract
Abstract An electrical circuit is provided comprising a pair of complementary transistors arranged as emitter followers, said transistors having their base-emitter circuits connected in parallel with each other and in series with a load resistor respectively. An impedance network is connected in parallel across the two base-emitter paths for biasing either one or the other transistor into conduction depending upon the polarity of the input signal. For low signal levels below the ''''diode drop'''' level of each transistor''s base-emitter junction, the impedance network directly couples the network to the load resistor.
Inventors
- 👤 Paul E Grandmont
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 13:48
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3069; H03F3/3076; H03F1/00; H03F1/32; H03F1/3217
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
117 words
An electrical circuit arrangement comprising; a pair of voltage supply terminals oF opposite polarity, a pair of complementary transistors connected in series between said voltage supply lines wherein the collector terminals corresponding to said transistors are respectively connected to one of said voltage supply terminals and the emitter terminals of said transistors are connected to each other at a common junction, a load impedance connected in series with said common emitter junction, an input terminal commonly connected to the base of each said transistor, and an impedance network connected in series between said common base input terminal and said common emitter junction, wherein said impedance network comprises a resistor shunted by a pair of oppositely biased diodes.
Claim 2
Dependent Claim
117 words
An electrical circuit arrangement comprising; a pair of voltage supply terminals oF opposite polarity, a pair of complementary transistors connected in series between said voltage supply lines wherein the collector terminals corresponding to said transistors are respectively connected to one of said voltage supply terminals and the emitter terminals of said transistors are connected to each other at a common junction, a load impedance connected in series with said common emitter junction, an input terminal commonly connected to the base of each said transistor, and an impedance network connected in series between said common base input terminal and said common emitter junction, wherein said impedance network comprises a resistor shunted by a pair of oppositely biased diodes.
Claim 3
Dependent Claim
47 words
An electrical circuit according to claim 1 further comprising: an operational amplifier having an input and being connected to said common base input terminal in series with said impedance network, and a feedback loop connected between said output load impedance and the input to said operational amplifier.
Claim 4
Dependent Claim
124 words
An electrical circuit arrangement comprising; a pair of voltage supply terminals of opposite polarity, a pair of complementary transistors connected in series between said voltage supply lines wherein the collector terminals corresponding to said transistors are respectively connected to one of said voltage supply terminals and the emitter terminals of said transistors are connected to each other at a common junction, a load impedance connected in series with said common emitter junction, an input terminal commonly connected to the base of each said transistor, and an impedance network connected in series between said common base input terminal and said common emitter junction, wherein said impedance network comprises a resistor shunted by a circuit path having a resistor and a reactive impedance connected in series.
Claim 5
Dependent Claim
124 words
An electrical circuit arrangement comprising; a pair of voltage supply terminals of opposite polarity, a pair of complementary transistors connected in series between said voltage supply lines wherein the collector terminals corresponding to said transistors are respectively connected to one of said voltage supply terminals and the emitter terminals of said transistors are connected to each other at a common junction, a load impedance connected in series with said common emitter junction, an input terminal commonly connected to the base of each said transistor, and an impedance network connected in series between said common base input terminal and said common emitter junction, wherein said impedance network comprises a resistor shunted by a circuit path having a resistor and a reactive impedance connected in series.
References Cited (Backward Citations)
US3441864A
Cited
US3469202A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-08-16 | 1975-02-15 | 1975-08-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-08-16 | 1979-02-15 | 1979-08-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-08-16 | 1983-02-15 | 1983-08-17 | $7700.00 | Window Closed / Lapsed |