Fsk demodulator and modulator combining differentiated counted signals into a weighted analog output

Claim 1

A demodulator device for frequency-modulated telegraphic signals having at least two different signal states represented by a different respective predetermined nominal frequency of a substantially sinusoidal received wave, said device comprising: an input receiving the wave in the form of a substantially sinusoidal voltage whose frequency may vary in time; means for deriving from such wave, by time differentiation at selected passages of said voltage through zero, a control signal corresponding to each such selected passage; means for deriving a delayed signal from said control signal; a clock pulse generator delivEring a sequence of clock pulses at a repetition frequency F much higher than any of said nominal frequencies; means for applying said sequence to the counting input of a pstage binary counter, p denoting an integer, said counter displaying the ''''modulo 2p'''' residue of the number of clock pulses applied thereto; means for controlling resetting said counter to a predetermined initial state by said delayed signal, and logic circuit means comprising a storage type data-gating circuit controlled by said control signal and displaying the state of the counter in the form of a group of p binary signals applied to p display terminals respectively, said device further comprising means for combining at least part of said group of p binary signals to form an analog signal formed by a voltage varying in dependence upon the makeup of said group; means for applying said analog signal to the input of a threshold circuit formed by cascading a low-pass filter, at least one linear amplifier and a decision circuit having at least one threshold level, and means for applying to a utilization terminal the signal delivered by said decision circuit.