Patent US4469942A successfully refreshed from Google Patents.
Patent US3600610A successfully refreshed from Google Patents.
US3600610A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Time delay circuit for a radiant energy protective apparatus
Assignee: Xerox Corp
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Filing: 1969-07-09
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Granted: 1971-08-17
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Expires: 1989-07-09
Abstract
Abstract This invention relates to document motion detention devices and, more particularly, to protection of original documents from burning or tearing in graphic information scanning and transporting systems. A time delay circuit is provided wherein a switch is continuously energized and deenergized to control the operation of associated circuitry for the external control of a lamp or other control circuitry. If this switch remains opened or closed for a length of time due to a malfunction within the external control circuitry, the time delay circuit would deenergize said external circuitry to prevent damage to said original documents.
Inventors
- 👤 Robert J Kelsch
- 👤 Paul F Schmitt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 21:09
CPC Classifications
G; G03; G03B; G03B27/00; G03B27/72; G03B27/32; G03B27/52; G03B27/62; G03B27/6207; G03B27/625; H; H03; H03K; H03K17/00; H03K17/28
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
250 words
A timing circuit comprising: a first capacitor coupled to a source of negative voltage, a normally open switch coupled to said capacitor for selectively connecting said negatively charged capacitor to a common ground, thereby shifting the voltage potential across said capacitor, a first transistor coupled to said first capacitor responsive to said shifted voltage level for electronically switching to a nonconducting state, a second transistor responsive to the conduction of said first transistor for establishing an electrical charging path to the source of negative voltage, a diode coupled to said second transistor, a second capacitor coupled to said diode for storing the negative source voltage on said second transistor when said transistor is in said nonconducting state whereby said diode is forward biased, a resistor connected in parallel with said second capacitor for discharging said stored voltage at a predetermined rate when said switch is placed in its normally open position thereby switching said first transistor to a conducting area and said diode is back biased due to the second transistor being switched to its nonconducting state, a third transistor responsive to the stored voltage on said second capacitor for electronically switching to a nonconducting state when said voltage falls below a predetermined level, and means coupled to said third transistor for selectively deenergizing a pair of output terminals, in response to said nonconducting state of said third transistor, a predetermined amount of time after said switch remains in its normally open position or is held in the closed position.
Claim 2
Dependent Claim
250 words
A timing circuit comprising: a first capacitor coupled to a source of negative voltage, a normally open switch coupled to said capacitor for selectively connecting said negatively charged capacitor to a common ground, thereby shifting the voltage potential across said capacitor, a first transistor coupled to said first capacitor responsive to said shifted voltage level for electronically switching to a nonconducting state, a second transistor responsive to the conduction of said first transistor for establishing an electrical charging path to the source of negative voltage, a diode coupled to said second transistor, a second capacitor coupled to said diode for storing the negative source voltage on said second transistor when said transistor is in said nonconducting state whereby said diode is forward biased, a resistor connected in parallel with said second capacitor for discharging said stored voltage at a predetermined rate when said switch is placed in its normally open position thereby switching said first transistor to a conducting area and said diode is back biased due to the second transistor being switched to its nonconducting state, a third transistor responsive to the stored voltage on said second capacitor for electronically switching to a nonconducting state when said voltage falls below a predetermined level, and means coupled to said third transistor for selectively deenergizing a pair of output terminals, in response to said nonconducting state of said third transistor, a predetermined amount of time after said switch remains in its normally open position or is held in the closed position.
Claim 3
Dependent Claim
207 words
A timing circuit comprising: a first capacitor coupled to a source of negative voltage, a normally open switch coupled to said capacitor for selectively connecting said negatively charged capacitor to a common ground, thereby shifting the voltage potential across said capacitor, a first transistor coupled to said first capacitor responsive to said shifted voltage level for electronically switching to a nonconducting state, a diode coupled to said first transistor, a second capacitor coupled to said diode for storing the negative source voltage on said first transistor when said transistor is in said nonconducting state whereby said diode is forward biased, a resistor connected in parallel with said second capacitor for discharging said stored voltage at a predetermined rate when said switch is placed in its normally open position thereby switching said first transistor to a conducting state and said diode is back biased, a second transistor responsive to the stored voltage on said second capacitor, for electronically switching to a nonconducting state when said voltage falls below a predetermined level, and means coupled to said second transistor for selectively energizing a pair of output terminals until said switch remains in its normally open position or is held in the closed position for a predetermined amount of time.
Claim 4
Dependent Claim
207 words
A timing circuit comprising: a first capacitor coupled to a source of negative voltage, a normally open switch coupled to said capacitor for selectively connecting said negatively charged capacitor to a common ground, thereby shifting the voltage potential across said capacitor, a first transistor coupled to said first capacitor responsive to said shifted voltage level for electronically switching to a nonconducting state, a diode coupled to said first transistor, a second capacitor coupled to said diode for storing the negative source voltage on said first transistor when said transistor is in said nonconducting state whereby said diode is forward biased, a resistor connected in parallel with said second capacitor for discharging said stored voltage at a predetermined rate when said switch is placed in its normally open position thereby switching said first transistor to a conducting state and said diode is back biased, a second transistor responsive to the stored voltage on said second capacitor, for electronically switching to a nonconducting state when said voltage falls below a predetermined level, and means coupled to said second transistor for selectively energizing a pair of output terminals until said switch remains in its normally open position or is held in the closed position for a predetermined amount of time.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-08-16 | 1975-02-15 | 1975-08-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-08-16 | 1979-02-15 | 1979-08-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-08-16 | 1983-02-15 | 1983-08-17 | $7700.00 | Window Closed / Lapsed |