Abstract As in existing frequency synthesizers, the frequency of a main tunable oscillator is controlled by being phase locked to a voltage obtained by comparing a pulse signal of comparable frequency derived by dividing the oscillator signal frequency by the necessary divisor. Binary-coded decimal switches set the divisor in steps equal to the standard frequency. A central feature of the present invention is a calibrated potentiometer supplied with a voltage that is inversely proportional to the frequency of the main oscillator and is of such a magnitude that moving the arm of the potentiometer from one end to the other will vary the frequency of the main oscillator continuously over a range which is equal to the difference between two successive frequencies determined by the switches, no matter what the frequency of the main oscillator may be. The voltage at the arm of the potentiometer is connected to the standard-frequency generator to modify its frequency a certain percentage, and a sweep signal may also be applied to sweep the standard signal over a limited band and thus sweep the signal of the main oscillator over a controlled band while still retaining a phaselocked condition.
A signal generator comprising: a. a main source producing a signal having a frequency fc; b. a frequency divider system connected to said main source to produce a first signal having a frequency R fc/N, in which N is an integral divisor; c. means connected to said main source of signal to produce a DC signal having a value inversely proportional to fc; d. means to generate a reference signal having a frequency approximately equal to R; e. means connected to said means to produce said DC signal to apply a controlled fraction of said DC signal to said means to generate said reference signal to modify the frequency of the reference signal produced therein; f. a comparison circuit connected to said divider system to compare said first signal with said reference signal to produce a control signal; and g. means to connect said control signal to said main source of signal to control the frequency fc.
Claim 2
Dependent Claim
157 words
A signal generator comprising: a. a main source producing a signal having a frequency fc; b. a frequency divider system connected to said main source to produce a first signal having a frequency R fc/N, in which N is an integral divisor; c. means connected to said main source of signal to produce a DC signal having a value inversely proportional to fc; d. means to generate a reference signal having a frequency approximately equal to R; e. means connected to said means to produce said DC signal to apply a controlled fraction of said DC signal to said means to generate said reference signal to modify the frequency of the reference signal produced therein; f. a comparison circuit connected to said divider system to compare said first signal with said reference signal to produce a control signal; and g. means to connect said control signal to said main source of signal to control the frequency fc.
Claim 3
Dependent Claim
21 words
The signal generator of claim 1 in which said means to produce a DC signal is connected to said divider system.
Claim 4
Dependent Claim
45 words
The signal generator of claim 1 in which said means to produce a DC signal comprises means to generate a rectangular pulse signal having a duty cycle inversely proportional to fc, and means to integrate said pulse signal to obtain the average DC value thereof.
Claim 5
Dependent Claim
68 words
The signal generator of claim 3 in which said divider system comprises flip-flop means to produce a second signal having a frequency r fc/n in which n is a unit of the largest digit of the number N, and said flip-flop is connected to said divider system to be reset by said first signal and to be actuated by said second signal to produce said rectangular pulse signal.