Pulse width modulated dc power supply

Claim 2

In a regulated DC power supply, the combination comprising input terminal means adapted for connection to an AC source of supply, a high-leakage reactance transformer having the primary connected to said input terminal means and the secondary connected directly to rectifying bridge means, load lines connected directly to the DC output of said bridge means, thyristor switching means connected in one of said load lines, capacitive means connected across said load lines on the load side of said thyristor switching means to assure, in conjunction with the high-leakage reactance, positive commutation of the thyristor switching means, so as to provide pulse width modulation control, control circuitry means including unijunction timing circuit means, voltage error sensing means, currentsensing means, and intermediate amplifying means responsive to signals from said voltage error sensing means and said current sensing means, and means for connecting the output of said intermediate amplifying means to said unijunction timing circuit means to control the firing angle of the unijunction circuit means, said unijunction timing circuit means including circuit means for effecting interbase voltage control of the unijunction.

Claim 3

A combination as defined in claim 1 which further includes a pulse-forming means electrically isolated from said timing circuit means for triggering said thyristor switching means, and means connected to said timing circuit means for controlling operation of said pulse-forming means.

Claim 4

In a regulated DC power supply, the combination comprising input terminal means adapted for connection to an AC source of supply, a high-reactance inductive means connected to said terminal means, a rectifying bridge means connected to said terminal means through said inductive means, load lines connected to the DC output terminals of said bridge means, a thyristor switching means serially connected in one of said load lines, a capacitive means connected across said load lines on the load side of said thyristor switching means, pulse width modulation control circuitry means for controlling the firing angle of said thyristor switching means, said inductive means providing a peak current limiting means for the pulse provided by the thyristor switching means, capacitive means connected across said load lines on the load side of said thyristor switching means, said capacitive means in conjunction with said inductive means assuring positive commutation of the thyristor switching means, means for sensing an output of said power supply, a timing circuit means including a unijunction transistor fired by base voltage control, said timing circuit means including an SCR, a resistance and capacitance connected in series, circuit means for charging said capacitance through said resistanCe upon firing of said SCR and discharging the capacitance upon turnoff of the SCR, means connecting said capacitance to the emitter of said unijunction transistor, means for controlling the firing of said unijunction transistor in response to signals from said sensing means, and pulse-forming means electrically isolated from said timing circuit means for triggering said thyristor switching means upon firing of said unijunction transistor.

Claim 5

In a regulated DC power supply, the combination comprising input terminal means adapted for connection to an AC source of supply, a high-reactance inductive means connected to said terminal means, a rectifying bridge means connected to said terminal means through said inductive means, load lines connected to the DC output terminals of said bridge means, a thyristor switching means serially connected in one of said load lines, a capacitive means connected across said load lines on the load side of said thyristor switching means, pulse width modulation control circuitry means for controlling the firing angle of said thyristor switching means, said inductive means providing a peak current limiting means for the pulse provided by the thyristor switching means, capacitive means connected across said load lines on the load side of said thyristor switching means, said capacitive means in conjunction with said inductive means assuring positive commutation of the thyristor switching means, means for sensing an output of said power supply, a timing circuit means including a unijunction transistor fired by base voltage control, said timing circuit means including an SCR, a resistance and capacitance connected in series, circuit means for charging said capacitance through said resistanCe upon firing of said SCR and discharging the capacitance upon turnoff of the SCR, means connecting said capacitance to the emitter of said unijunction transistor, means for controlling the firing of said unijunction transistor in response to signals from said sensing means, and pulse-forming means electrically isolated from said timing circuit means for triggering said thyristor switching means upon firing of said unijunction transistor.

Claim 6

A combination as defined in claim 3 in which said timing circuit means further includes means for generating a pulsating DC voltage timed to the half wave frequency of said AC source of input power, and means pulsed by said pulsating voltage for periodically triggering said SCR in timed relationship with the input AC.

Claim 7

A combination as defined in claim 4 wherein said pulse-triggering means for said SCR includes a reference voltage which varies with the input AC voltage thereby to vary the timing of aid pulse and provide preregulation of the timing circuit means.

Claim 8

A combination as defined in claim 3 in which said timing circuit means further includes means for periodically applying a triggering pulse to said SCR to render the SCR conductive in timed relationship with said AC source of input power, and means for positively resetting said SCR to a nonconductive condition upon each firing of said unijunction transistor.

Claim 9

A combination as defined in claim 6 in which the output circuit of said unijunction transistor includes a capacitance, means including a resistance connects the junction of said unijunction transistor and said capacitance with the anode of said SCR, and circuit means connected to said anode provides a control connection to the base of a transistor included in said thyristor pulse forming means.