Digital-to-analog conversion circuits

Claim 2

A digital-to-analog converter circuit including: successively-spaced a plurality of voltage sources for providing a plurality of digitally weighted voltages with respect to a point of common voltage; a plurality of terminals; means for applying different ones of said plurality of voltage sources to respective associated ones of said plurality of terminals; a plurality of capacitors, each of said capacitors being associated with one of said terminals; means responsive to a control signal for connecting different ones of said capacitors between respective associated ones of said plurality of terminals and said point of common voltage to charge each of said capacitors to the digitally weighted voltage applied to the respective associated terminal; and means responsive to the absence of said control signal for connecting said capacitors in series with one another to provide an analog output voltage thereacross.

Claim 3

The digital-to-analog converter circuit as defined in claim l in which said voltage applying means comprises: means connecting only selectable ones of said voltage sources to respective associated ones of said terminals to represent a digitally encoded value; and whereby said output voltage is an analog signal representation of said digitally encoded value.

Claim 4

The digital-to-analog conversion circuit as defined in claim 1 in which said voltages are simultaneously applied to said respective capacitors.

Claim 5

In combination: a plurality of voltage sources for providing a plurality of digitally weighted voltages with respect to a point of common voltage; a plurality of capacitors; a plurality of bistable circuits each providing a select signal representing a predetermined binary bit of a binary digital value and each of said bistable circuits being associated with one of said capacitors; a plurality of devices, each device providing an associated one of said digitally weighted voltages on a terminal in response to an associated select signal and the same device providing said common voltage on said terminal otherwise; means for connecting different associated ones of said plurality of capacitors between the respective associated ones of said terminals and said point of common voltage during a first time interval, thereby charging each capacitor to the voltage applied between the respective associated terminal and said point of common voltage; and means for connecting said capacitors in series with one another during a second time interval to provide thereacross an analog signal representation of said binary digital value.

Claim 6

In combination: a plurality of voltage sources for providing a plurality of digitally weighted voltages with respect to a point of common voltage; a plurality of capacitors; a plurality of bistable circuits each providing a select signal representing a predetermined binary bit of a binary digital value and each of said bistable circuits being associated with one of said capacitors; a plurality of devices, each device providing an associated one of said digitally weighted voltages on a terminal in response to an associated select signal and the same device providing said common voltage on said terminal otherwise; means for connecting different associated ones of said plurality of capacitors between the respective associated ones of said terminals and said point of common voltage during a first time interval, thereby charging each capacitor to the voltage applied between the respective associated terminal and said point of common voltage; and means for connecting said capacitors in series with one another during a second time interval to provide thereacross an analog signal representation of said binary digital value.

Claim 7

The combination as defined in claim 4 in which: alternate voltage sources of said plurality of voltage sources provide voltages having an opposite sense with respect to said common voltage; and predetermined pairs of said plurality of capacitors are fixedly connected in series.

Claim 8

The combination as defined in claim 4 also including: at least one additional plurality of capacitors; at least one additional plurality of bistable circuits, said additional plurality of bistable circuits providing an additional plurality of select signals, each of said additional plurality of select signals representing a predetermined binary bit of an additional associated binary digital value and each of said additional plurality of bisTable circuits being associated with one of said additional plurality of capacitors; at least one additional plurality of devices, each of said additional plurality of devices providing an associated one of said digitally weighted voltages on a terminal in response to an associated select signal provided by one of said additional plurality of bistable circuits and each of said additional plurality of devices providing said common voltage on the last mentioned terminal otherwise; means for connecting different associated ones of said additional plurality of capacitors between the respective terminals of associated ones of said additional plurality of devices and said point of common voltage during said first time interval, thereby charging each of said additional plurality of capacitors to the voltage applied between the respective terminal of the associated device and said point of common voltage; and means for connecting the respective ones of said additional plurality of capacitors in series with one another during said second time interval to provide across said additional plurality of capacitors an analog signal representation of said additional associated binary digital value.

Claim 9

The combination as defined in claim 6 in which: alternate voltage sources of said plurality of voltage sources provide voltages having an opposite sense with respect to said common voltage; predetermined pairs of a first plurality of capacitors are fixedly connected in series; and predetermined pairs of said second plurality of capacitors are fixedly connected in series.

Claim 10

In combination, a digital-to-analog converter comprising: a plurality of voltage sources for providing digitally weighted voltages with respect to a common voltage point; a plurality of single pole double throw switching devices, each switching device connecting a different one of said voltage sources to a terminal in response to an associated select signal, and the same device connecting said common voltage point to said terminal otherwise; a plurality of capacitors, each of said capacitors being associated with a switching device; a plurality of bistable circuits, each connected to an associated one of said plurality of single pole double throw switching devices for providing during a first time interval an associated select signal representing a predetermined digitally weighted binary bit of a binary digital value; a plurality of switching devices responsive to a control signal during a first time interval for connecting ones of said capacitors between respective associated ones of said terminals and said common voltage point, thereby applying across each capacitor the voltage applied between the respective associated terminal and said common voltage point; and said devices being responsive to the absence of said control signal during a second time interval for connecting said capacitors in series with one another between a converter output terminal and said common voltage point to provide thereacross an analog voltage proportional to said binary digital value.

Claim 11

In combination, a digital-to-analog converter comprising: a plurality of voltage sources for providing digitally weighted voltages with respect to a common voltage point; a plurality of single pole double throw switching devices, each switching device connecting a different one of said voltage sources to a terminal in response to an associated select signal, and the same device connecting said common voltage point to said terminal otherwise; a plurality of capacitors, each of said capacitors being associated with a switching device; a plurality of bistable circuits, each connected to an associated one of said plurality of single pole double throw switching devices for providing during a first time interval an associated select signal representing a predetermined digitally weighted binary bit of a binary digital value; a plurality of switching devices responsive to a control signal during a first time interval for connecting ones of said capacitors between respective associated ones of said terminals and said common voltage point, thereby applying across each capacitor the voltage applied between the respective associated terminal and said common voltage point; and said devices being responsive to the absence of said control signal during a second time interval for connecting said capacitors in series with one another between a converter output terminal and said common voltage point to provide thereacross an analog voltage proportional to said binary digital value.

Claim 12

The combination as defined in claim 8 in which: said capacitors are connected in series with one another in a predetermined order during said second time interval; alternate ones of said capacitors with respect to said order are selectively charged during said first time interval to voltages having a first sense with respect to said common voltage; intervening ones of said capacitors each of which is connected between two of said alternate capacitors are selectively charged during said first time interval to voltages having a second sense with respect to said common voltage; and successive alternate ones of said capacitors with respect to said order are each fixedly connected to a different one of said intervening capacitors to form successive pairs of fixedly connected capacitors with respect to said order.

Claim 13

The digital-to-analog converter circuit as defined in claim 2 in which said voltage applying means comprises: switching means for connecting selected ones of said plurality of voltage sources to respective associated ones of said terminals in response to predetermined binary bits of a binary digital value; means for connecting to said point of common voltage, the ones of said terminals which are not connected to selected voltage sources; and whereby said analog output signal is an analog signal representation of said binary digital value.