Dial pulse receiver circuit

Claim 1

In an automatic telephone system having a pulsing loop connected to a direct current feed circuit, a pulse circuit including a pair of input terminals connected across said pulsing loop, a first transistor having emitter, base and collector elements, means biasing said transistor to conduct at a first level in response to application of a first set of potentials to said input terminals and at a second level in response to application of a second set of potentials to said input terminals including means connecting said base element through a first resistor R1 to a first one of said input terminals and over a second resistor R2 to a voltage of a first fixed value means connecting said collector element over a third resistor R3 to a second one of said input terminals, and means connecting said emitter over a fourth resistor R4 to a voltage source of a second fixed value, said resistors being of a value approximately in the relation R4(R1+R2) (R2)(R3) said transistor having increased conductivity relative to its existing level of conduction at the time of occurrence of the positive cycle of a common mode signal at said first terminal tending to make the potential at said collector more negative relative to ground and of a value to balance out the more positive potential at said second terminal, said transistor having decreased conductivity relative to its existing level of conduction during the negative cycle of a common mode signal at said first terminal causing the collector potential to tend to go more positive relative to ground to a value which balances out the more negative potential which appears at the collector of said transistor, whereby said transistor rejects the common mode signals which occur on said input terminals, and an output circuit connected to said transistor to provide a holding circuit for associated equipment only when said second set of potentials is applied to said loop.