Patent US3593156A successfully refreshed from Google Patents.
US3593156A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Frequency doubler
Assignee: General Electric Co
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Filing: 1968-12-31
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Granted: 1971-07-13
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Expires: 1988-12-31
Abstract
Abstract A circuit for doubling the frequency of an alternating signal. The signal is rectified into positive and negative components. Each component is then shifted from the zero reference by blocking capacitors so that it has equal areas under the positive and negative half-cycle waveforms. The signals are compared in a difference amplifier which produces a positive or negative output depending on which input is more positive. In one cycle of the input signal four such changes occur, producing a square wave output of double the input frequency.
Inventors
- 👤 Harley D Jordan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:12
CPC Classifications
H; H03; H03B; H03B19/00; H03B19/16
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
119 words
A frequency-doubling circuit comprising: means for rectifying an alternating signal into positive and negative signals; means for shifting each of said rectified signals relative to its zero voltage level to produce positive and negative voltage half-cycles; a difference amplifier having two input terminals and an output terminal; said difference amplifier producing a positive output when the voltage at one input is more positive than that at the other input, and producing a negative output when the voltage at the other input is more positive than that at the one input; and said rectified and shifted signals being applied to the input terminals of said difference amplifier, whereby a square wave output of double the original alternating frequency is produced.
Claim 2
Dependent Claim
119 words
A frequency-doubling circuit comprising: means for rectifying an alternating signal into positive and negative signals; means for shifting each of said rectified signals relative to its zero voltage level to produce positive and negative voltage half-cycles; a difference amplifier having two input terminals and an output terminal; said difference amplifier producing a positive output when the voltage at one input is more positive than that at the other input, and producing a negative output when the voltage at the other input is more positive than that at the one input; and said rectified and shifted signals being applied to the input terminals of said difference amplifier, whereby a square wave output of double the original alternating frequency is produced.
Claim 3
Dependent Claim
50 words
A frequency-doubling circuit in accordance with claim 1 further comprising: a feedback network between the output terminal of said difference amplifier and one of its input terminals; and said feedback network comprising first (40) and second (22) resistors connected in series and a capacitor connected between them and to ground.
Claim 4
Dependent Claim
26 words
A frequency-doubling circuit in accordance with claim 2 wherein said means for rectifying said alternating signal comprises: a pair of oppositely poled diodes (12 and 14).
Claim 5
Dependent Claim
90 words
A frequency-doubling circuit in accordance with claim 3 wherein said means for shifting each of said rectified signals comprises: a pair of blocking capacitors (12 and 14) each having one terminal connected to one of said pair of diodes; a resistor (30) having one terminal connected to the other terminal of one of said pair of blocking capacitors (28) and its other terminal connected to ground; and a resistor (22) having one terminal connected to the other of said blocking capacitors, said resistor also constituting part of said feedback circuit.
Claim 6
Dependent Claim
255 words
A frequency-doubling circuit comprising: input terminals for receiving an alternating signal; a pair of oppositely poled diodes each having one terminal connected to said input terminals; a pair of blocking capacitors having one terminal connected to the other terminals of said diodes; two series-connected resistors having a first ground connection between them, connected across the other terminals of said diodes; a difference amplifier having its two input terminals connected to the other terminals of said capacitors; a resistor connected between said first ground connection and the other terminal of one of said capacitors; a second pair of series-connected resistors connected between the output of said difference amplifier and the other terminal of the other of said capacitors; and a capacitor having one terminal connected to the junction of said second pair of resistors, and the other terminal connected to ground. a pair of blocking capacitors having one terminal connected to the other terminals of said diodes; two series-connected resistors having a first ground connection between them, connected across the other terminals of said diodes; a difference amplifier having its two input terminals connected to the other terminals of said capacitors; a resistor connected between said first ground connection and the other terminal of one of said capacitors; a second pair of series connected resistors connected between the output of said difference amplifier and the other terminal of the other of said capacitors; and a capacitor having one terminal connected to the junction of said second pair of resistors, and the other terminal connected to ground.
Claim 7
Dependent Claim
255 words
A frequency-doubling circuit comprising: input terminals for receiving an alternating signal; a pair of oppositely poled diodes each having one terminal connected to said input terminals; a pair of blocking capacitors having one terminal connected to the other terminals of said diodes; two series-connected resistors having a first ground connection between them, connected across the other terminals of said diodes; a difference amplifier having its two input terminals connected to the other terminals of said capacitors; a resistor connected between said first ground connection and the other terminal of one of said capacitors; a second pair of series-connected resistors connected between the output of said difference amplifier and the other terminal of the other of said capacitors; and a capacitor having one terminal connected to the junction of said second pair of resistors, and the other terminal connected to ground. a pair of blocking capacitors having one terminal connected to the other terminals of said diodes; two series-connected resistors having a first ground connection between them, connected across the other terminals of said diodes; a difference amplifier having its two input terminals connected to the other terminals of said capacitors; a resistor connected between said first ground connection and the other terminal of one of said capacitors; a second pair of series connected resistors connected between the output of said difference amplifier and the other terminal of the other of said capacitors; and a capacitor having one terminal connected to the junction of said second pair of resistors, and the other terminal connected to ground.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-07-12 | 1975-01-11 | 1975-07-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-07-12 | 1979-01-11 | 1979-07-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-07-12 | 1983-01-11 | 1983-07-13 | $7700.00 | Window Closed / Lapsed |