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US3593032A Expired / Lapsed US ⏱️ 0.0 years remaining

Mosfet static shift register

Assignee: Raytheon Co
•
Filing: 1969-12-15
•
Granted: 1971-07-13
•
Expires: 1989-12-15
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Abstract

Abstract A static serial shift register of a type that can be constructed on a single semiconductor substrate with metal oxide semiconductor field effect transistor (MOSFET) techniques which has a single RS flip-flop plus two MOSFET''s per stage where the MOSFET''s are gated by a clock pulse to conduct the output of a preceding RS flip-flop to a subsequent RS flip-flop.

Inventors

  • 👤 Stephen P F Ma

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 02:37
CPC Classifications
H; H03; H03K; H03K23/00; H03K23/40; H03K23/50; H03K23/54

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 49 words
A static shift register as claimed in claim 1 which further includes: input means for applying signals to the second signal terminals of the MOSFET gating transistors having their first signal terminals connected to the set and reset inputs of the first of said series of MOSFET flip-flop stages.
Claim 2
Dependent Claim 61 words
A static shift register as claimed in claim 2 wherein said input means includes: a MOSFET flip-flop stage having a set input and a reset input, said MOSFET flip-flop stage operable to be set in response to said reset signal applied to its set input and to be reset in response to said clock pulse signal applied to its reset input.
Claim 3
Dependent Claim 52 words
A static shift register as claimed in claim 2 wherein: said input means is the set and reset output signals from the last of said series of MOSFET flip-flop stages; and at least one of said series of MOSFET flip-flop stages is operable to be set in response to said reset signal.
Claim 4
Dependent Claim 72 words
A static shift register as claimed in claim 1 wherein: the capacitance of the set input and the first reset input of each of said MOSFET flip-flop stages is operable to retain the set output signal and reset output signal of the previous MOSFET flip-flop stage on the set input and first reset input, respectively, of said flip-flop stage for Some time after said plurality of MOSFET gating transistors have stopped conducting.

References Cited (Backward Citations)

US3283169A Cited
US3363115A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-07-12 1975-01-11 1975-07-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-07-12 1979-01-11 1979-07-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-07-12 1983-01-11 1983-07-13 $7700.00 Window Closed / Lapsed

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