US3283169A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Redundancy circuit
Assignee: Philips North America LLC
•
Filing: 1960-07-11
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Granted: 1966-11-01
•
Expires: 1980-07-11
Abstract
No abstract record available.
Inventors
- 👤 William H Libaw
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 13:15
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/16; G06F11/18; G06F11/187; H; H03; H03K; H03K19/00; H03K19/003; H03K19/00392
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
123 words
IN COMBINATION, AT LEAST TWO INPUT TERMINALS FOR RECEIVING INPUT SIGNALS, FOUR TRANSISTORS EACH HAVING A BASE, AN EMITTER AND A COLLECTOR AND HAVING CONDUCTIVE AND NON-CONDUCTIVE STATES, A PAIR OF RESISTIVE CIRCUIT ARRANGEMENTS FOR EACH OF THE TRANSISTORS, ONE ARRANGEMENT OF EACH OF THE PAIRS OF ARRANGEMENTS BEING CONNECTED FROM THE BASE OF THE ASSOCIATED TRANSISTOR TO ONE OF THE TWO INPUTS TERMINALS, THE OTHER ARRANGEMENT OF EACH OF THE PAIRS OF ARRANGEMENTS BEING CONNECTED FROM THE BASE OF THE ASSOCIATED TRANSISTOR TO THE OTHER ONE OF THE TWO INPUT TERMINALS, EACH OF THE ARRANGEMENTS INCLUDING AT LEAST TWO SERIALLY CONNECTED RESISTORS, BIASING MEANS COUPLED TO THE BASES OF EACH OF SAID FOUR TRANSISTORS AND INCLUDING AT LEAST TWO SERIALLY CONNECTED RESISTORS
Claim 2
Dependent Claim
123 words
IN COMBINATION, AT LEAST TWO INPUT TERMINALS FOR RECEIVING INPUT SIGNALS, FOUR TRANSISTORS EACH HAVING A BASE, AN EMITTER AND A COLLECTOR AND HAVING CONDUCTIVE AND NON-CONDUCTIVE STATES, A PAIR OF RESISTIVE CIRCUIT ARRANGEMENTS FOR EACH OF THE TRANSISTORS, ONE ARRANGEMENT OF EACH OF THE PAIRS OF ARRANGEMENTS BEING CONNECTED FROM THE BASE OF THE ASSOCIATED TRANSISTOR TO ONE OF THE TWO INPUTS TERMINALS, THE OTHER ARRANGEMENT OF EACH OF THE PAIRS OF ARRANGEMENTS BEING CONNECTED FROM THE BASE OF THE ASSOCIATED TRANSISTOR TO THE OTHER ONE OF THE TWO INPUT TERMINALS, EACH OF THE ARRANGEMENTS INCLUDING AT LEAST TWO SERIALLY CONNECTED RESISTORS, BIASING MEANS COUPLED TO THE BASES OF EACH OF SAID FOUR TRANSISTORS AND INCLUDING AT LEAST TWO SERIALLY CONNECTED RESISTORS
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1969-10-31 | 1970-05-02 | 1970-11-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1973-10-31 | 1974-05-02 | 1974-11-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1977-10-31 | 1978-05-02 | 1978-11-01 | $7700.00 | Window Closed / Lapsed |