Signal averaging system

Claim 3

A system according to claim 1 wherein said dividing means comprises: a plurality of series-connected resistors of equal resistance value; and means responsive to each successive input signal received by said sensing means for connecting one additional of said resistors in series with said converting means.

Claim 4

A system according to claim 1 wherein said sensing means comprises: a plurality of threshold-voltage-responsive interrogating means, each producing an interrogated output signal in response to each input signal received which has at least a threshold-voltage-responsive magnitude; a plurality of signal releasing means, each connected to a different one of said interrogating means, and at least partially conditioned in response to the receipt of an interrogated output signal, for releasing a counting signal when otherwise not inhibited; and a plurality of inhibiting means, each connected to a different one of said interrogating means, excluding the one associated with the lowest magnitude range, and responsive to an output signal from an associated interrogating means for inhibiting the release of a counting signal by said signal releasing means associated with an interrogating means responsive to the next lower input signal magnitude range.

Claim 5

A system according to claim 1 wherein said converting means comprises: a plurality of first means respectively associated with said counting means, each first means converting the output signal received from the associated counting means into an output analog signal representative in magnitude to the total number of counting signals counted by said associated counting means; and a plurality of second means respectively connected to the outputs of said first means for adjusting and combining all of said analog signals into a single weighted output signal representative of the total number of input signals received by said system, each of said analog signals prior to being combined being adjusted so that the actual magnitude of each input signal represented thereby is equated to a predetermined normalized signal magnitude.

Claim 6

A system according to claim 4 wherein each of said counting means comprises a binary counter, and wherein each of said first means of said converting means comprises a digital-to-analog converter.

Claim 7

An apparatus according to claim 5 wherein each of said second means connected to said first means comprises a resistor interconnected between the output of the associated digital-to-analog converter and a common bus.

Claim 8

An electrical system for determining a representative value for the average magnitude of a plurality of input signals of diverse magnItudes received within a predetermined period of time comprising: a plurality of threshold-voltage-responsive interrogating means, each responsive to an input signal falling within a different input signal magnitude range, and each producing an interrogated output signal whenever an input signal is received which has a magnitude within the responsive magnitude range; a plurality of gate means respectively connected to said interrogating means, each gate means in response to the receipt of an interrogated signal being at least partially conditioned to an enabled state, and whenever enabled, releasing a counting signal; and a plurality of inverter means, each connected to a different one of said interrogating means, excluding the one associated with the lowest minimum input signal magnitude range, and each of said inverter means in response to the absence of an output signal from an associated interrogating means, supplying a signal to and at least partially conditioning for the release of a counting signal the gate means associated with the interrogating means responsive to input signals received within the next lower signal magnitude range; means for supplying an enabling signal at least to said gate means otherwise conditioned to be enabled each time an input signal within one of said magnitude ranges is received by said system; a plurality of counting means respectively connected to said gate means, each counting means initially counting the number of counting signals released by the associated gate means within said predetermined period of time, and subsequently producing an output signal representative of the total count; a plurality of converting means respectively connected to said counting means, for combining the output signals of said counting means, and for producing an output signal that is representative of the weighted summation of range-normalized magnitudes of the input signals counted by said system; and means for dividing the magnitude of the last-mentioned output signal by the total number of input signals counted by said system within said predetermined period of time.

Claim 9

An electrical system for determining a representative value for the average magnitude of a plurality of input signals of diverse magnItudes received within a predetermined period of time comprising: a plurality of threshold-voltage-responsive interrogating means, each responsive to an input signal falling within a different input signal magnitude range, and each producing an interrogated output signal whenever an input signal is received which has a magnitude within the responsive magnitude range; a plurality of gate means respectively connected to said interrogating means, each gate means in response to the receipt of an interrogated signal being at least partially conditioned to an enabled state, and whenever enabled, releasing a counting signal; and a plurality of inverter means, each connected to a different one of said interrogating means, excluding the one associated with the lowest minimum input signal magnitude range, and each of said inverter means in response to the absence of an output signal from an associated interrogating means, supplying a signal to and at least partially conditioning for the release of a counting signal the gate means associated with the interrogating means responsive to input signals received within the next lower signal magnitude range; means for supplying an enabling signal at least to said gate means otherwise conditioned to be enabled each time an input signal within one of said magnitude ranges is received by said system; a plurality of counting means respectively connected to said gate means, each counting means initially counting the number of counting signals released by the associated gate means within said predetermined period of time, and subsequently producing an output signal representative of the total count; a plurality of converting means respectively connected to said counting means, for combining the output signals of said counting means, and for producing an output signal that is representative of the weighted summation of range-normalized magnitudes of the input signals counted by said system; and means for dividing the magnitude of the last-mentioned output signal by the total number of input signals counted by said system within said predetermined period of time.

Claim 10

A system in accordance with claim 7 wherein each of said converting means for producing an output summation signal comprises: a digital-to-analog converter for converting the output signal received in digital form from an associated counting means into an analog signal representative of the total count registered in said registered in said associated counting means; and means for adjusting and combining the analog signals from all of said digital-to-analog converters so as to produce a weighted output signal representative of the magnitudes of all of the input signals received by said system within said predetermined period of time, the magnitude of each of said analog signals prior to being combined being adjusted so that the actual magnitude of each input signal received within a given magnitude range and represented by a given analog signal is equated to a predetermined normalized signal magnitude.

Claim 11

An electrical system in accordance with claim 8, wherein said means for combining the analog signals comprises a plurality of resistors each interconnected between the output of the respectively associated digital-to-analog converter and a common bus, and wherein said means for dividing the magnitude of the output summation signal comprises a plurality of series-connected resistors of equal resistance value, and movable switch means for connecting successive ones of said resistors in series with said common bus in response to successive input signals being received by said interrogating means.