Dc to dc converter circuit with load voltage regulation utilizing a controlled simulated saturating core

Claim 2

A DC to DC converter comprising an inverter circuit including a transformer with a feedback primary winding and an output secondary winding, and means to control the switching frequency of said inverter, said means to control including a volt-time integrator to integrate the voltage across said output secondary winding, said volt-time integrator comprising a resistance with impedance adjustment means and a capacitor, a shunt path coupled across said output secondary winding, said shunt path including a low impedance linear inductive reactance and a semiconductor gate connected in series thereto, said semiconductor gate having a control electrode, means to activate said gate in response to a particular voltage magnitude across said capacitor including a voltage threshold breakdown diode coupling said capacitor voltage to said control electrode, said inductive reactance inducing a reverse voltage in said output secondary winding to initiate switching action in said inverter circuit when said gate is activated.

Claim 3

A DC to DC converter as defined in claim 1 wherein said transformer includes a saturating winding isolated from said inverter circuit and rectifying meaNs to derive a voltage from said saturating winding.

Claim 4

A DC to DC converter as defined in claim 2 wherein a feedback arrangement responds to variation in the voltage output of said rectifying means to alter the impedance of said resistance.

Claim 5

A free running voltage regulated inverter circuit comprising two transistors, a transformer having a primary winding and first and second secondary windings, said transformer including a magnetic path common to said primary and said first secondary winding having linear magnetic characteristics and magnetic shunt means to separate said first and second secondary windings, said two transistors coupled to the primary winding of said transformer in a push-pull arrangement, means to simulate magnetic saturation in said first secondary winding of said transformer including an energy storage device, means to control the rate at which said energy storage device stores energy, an inductive reactor, gating means responsive to a predetermined energy level in said energy storage device to shunt said inductive reactor across said first secondary of said transformer, said second secondary winding wound on a magnetic path of said transformer having saturating characteristics, and feedback means from said second secondary winding to said means to control the rate whereby deviations in the voltage magnitude derived from said second secondary winding are utilized to adjust said means to control the rate to regulate the charging rate of said energy storage means which in turn controls the switching frequency of said inverter in order to regulate the voltage output of said second secondary winding.

Claim 6

A free running voltage regulated inverter circuit comprising two transistors, a transformer having a primary winding and first and second secondary windings, said transformer including a magnetic path common to said primary and said first secondary winding having linear magnetic characteristics and magnetic shunt means to separate said first and second secondary windings, said two transistors coupled to the primary winding of said transformer in a push-pull arrangement, means to simulate magnetic saturation in said first secondary winding of said transformer including an energy storage device, means to control the rate at which said energy storage device stores energy, an inductive reactor, gating means responsive to a predetermined energy level in said energy storage device to shunt said inductive reactor across said first secondary of said transformer, said second secondary winding wound on a magnetic path of said transformer having saturating characteristics, and feedback means from said second secondary winding to said means to control the rate whereby deviations in the voltage magnitude derived from said second secondary winding are utilized to adjust said means to control the rate to regulate the charging rate of said energy storage means which in turn controls the switching frequency of said inverter in order to regulate the voltage output of said second secondary winding.

Claim 7

A free running voltage regulated inverter circuit as defined in claim 4 wherein said means to control the rate comprises a variable impedance including a diode bridge coupled in parallel with a fixed impedance and a transistor whose collector-emitter path shunts opposite terminals of said diode bridge and whose base is coupled to the voltage output of said second secondary winding.

Claim 8

A free running voltage regulated inverter circuit as defined in claim 5 wherein said inductive reactor and said gate are series connected, the said series connection being connected in shunt with said first secondary winding whereby the reverse voltage characteristic of said inductive reactor induces switching in the transistors of said inverter when said gate is triggered into conduction.

Claim 9

A free running voltage regulated inverter as defined in claim 6 wherein said gate comprises a triac and a threshold responsive device to trigger said triac.

Claim 10

A DC to DC converter comprising a push-pull square wave inverter circuit in which two switching transistors are arranged in a self-oscillating arrangement in combination with a transformer to produce an alternating current in the windings of the transformer, means to simulate saturation in at least a portion of the core of said transformer common to said inverter circuit, said means to simulate including means to integrate the voltage applied to the windings of said transformer, said means to integrate comprising a resistance with impedance adjustment means connected in series with a capacitor, a series connected low impedance inductor with a linear inductive reactance and semiconductor gating means shunting said windings, means responsive to said means to integrate to activate said gating means including a semiconductor voltage breakdown diode interconnecting said capacitor and said gating means, means to rectify an output voltage derived from said transformer, and means to alter the time constant of said means to integrate in response to variations in the rectified output voltage, said means to alter including means to control said impedance adjustment means comprising a variable impedance transistor device whereby said integrator integrates the volt-time area of voltage applied to said windings and said gating means is activated at the attainment of a predetermined volt-time area as determined by said time constant, said gating means when activated shorting said windings and halting the increase in magnetic flux in said core thereby simulating saturation therein and inducing switching action in said inverter circuit.

Claim 11

A DC to DC converter comprising a push-pull square wave inverter circuit in which two switching transistors are arranged in a self-oscillating arrangement in combination with a transformer to produce an alternating current in the windings of the transformer, means to simulate saturation in at least a portion of the core of said transformer common to said inverter circuit, said means to simulate including means to integrate the voltage applied to the windings of said transformer, said means to integrate comprising a resistance with impedance adjustment means connected in series with a capacitor, a series connected low impedance inductor with a linear inductive reactance and semiconductor gating means shunting said windings, means responsive to said means to integrate to activate said gating means including a semiconductor voltage breakdown diode interconnecting said capacitor and said gating means, means to rectify an output voltage derived from said transformer, and means to alter the time constant of said means to integrate in response to variations in the rectified output voltage, said means to alter including means to control said impedance adjustment means comprising a variable impedance transistor device whereby said integrator integrates the volt-time area of voltage applied to said windings and said gating means is activated at the attainment of a predetermined volt-time area as determined by said time constant, said gating means when activated shorting said windings and halting the increase in magnetic flux in said core thereby simulating saturation therein and inducing switching action in said inverter circuit.