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Junction field effect power transistor with internally interconnected gate electrodes

Assignee: US Philips Corp
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Filing: 1969-10-13
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Granted: 1971-06-22
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Expires: 1989-10-13
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Abstract

Abstract A junction field effect transistor adapted for power applications is described. It comprises interdigital source and drain contacts and a surface gate electrode connected at its ends to a substrate gate. To reduce the gate resistance, plural zones are provided which extend through the channel interconnecting the surface gate with the substrate gate regions. The interconnecting zones may be in the form of columns or strips.

Inventors

  • 👤 Rijkent Jan Nienhuis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 01:44
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/83; H10D99/00; H10W; H10W15/00; H10W15/01; Y; Y10; Y10S; Y10S148/00; Y10S148/018; Y10S148/043; Y10S148/053; Y10S148/145

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 20 words
A semiconductor device as claimed in claim 1 wherein the interconnecting zone is fully surrounded by the first surface zone.
Claim 2
Dependent Claim 68 words
A semiconductor device as claimed in claim 1 wherein the interconnecting zone comprises a strip-shaped region adjoining the said one surface, the longitudinal dimension of said interconnecting zone extends at substantially right angles to that of the second surface zone, and said strip-shaped interconnecting zone divides the first surface zone of the opposite conductivity type into partial zones, the source and drain electrodes contacting all the partial zones.
Claim 3
Dependent Claim 18 words
A semiconductor device as claimed in claim 1 wherein the source and drain electrodes form an interdigital system.
Claim 4
Dependent Claim 44 words
A semiconductor device as claimed in claim 1 wherein the first surface zone of the opposite conductivity type is a diffused zone in a substrate of said one conductivity type and the said interconnecting zone is formed by a portion of the said substrate.
Claim 5
Dependent Claim 36 words
A semiconductor device as claimed in claim 1 wherein the source and drain connections comprise a highly doped surface region of the opposite conductivity type at least at the contact places with the first surface zone.
Claim 6
Dependent Claim 14 words
A semiconductor device as claimed in claim 1 wherein plural interconnecting zones are provided.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-06-21 1974-12-21 1975-06-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-06-21 1978-12-21 1979-06-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-06-21 1982-12-21 1983-06-22 $7700.00 Window Closed / Lapsed

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