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US3586835A
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Digital cardiotachometer
Assignee: United States Department of the Air Force
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Filing: 1968-04-19
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Granted: 1971-06-22
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Expires: 1988-04-19
Abstract
Abstract A digital cardiotachometer having a down counter with a hyperbolic rate that is started and terminated by successive heartbeats and the heartbeat is read out of a register. The counter output is also fed into a logic circuit which inhibits pulses in the counter in a feedback loop to obtain the hyperbolic counter rate. The highest expected heart rate is initially reset into the counter which starts its hyperbolic countdown after a delay that is controlled by the counter itself. The logic circuit generates a pulse which switches the input to the counter through a gating circuit, from linear to hyperbolic input pulses.
Inventors
- 👤 Adolph W Foeh Jr
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 14:09
CPC Classifications
H; H03; H03K; H03K21/00; A; A61; A61B; A61B5/00; A61B5/02; A61B5/024; A61B5/0245; G; G06; G06F; G06F7/00; G06F7/60; G06F7/62; Y; Y10; Y10S; Y10S128/00; Y10S128/903
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
89 words
A digital system for determining the rate of heartbeats comprising: a. a binary down counter; b. means for starting the counter upon reception of the first heartbeat; c. a logic circuit fed by the outputs of the counter; d. a pulse inhibiting circuit fed by the logic circuit originating from the current count in the counter for controlling the rate of a counter; e. means for terminating the counter upon reception of the second heartbeat; and f. an output registeR fed by the counter, the register indicating heartbeat rate.
Claim 2
Dependent Claim
89 words
A digital system for determining the rate of heartbeats comprising: a. a binary down counter; b. means for starting the counter upon reception of the first heartbeat; c. a logic circuit fed by the outputs of the counter; d. a pulse inhibiting circuit fed by the logic circuit originating from the current count in the counter for controlling the rate of a counter; e. means for terminating the counter upon reception of the second heartbeat; and f. an output registeR fed by the counter, the register indicating heartbeat rate.
Claim 3
Dependent Claim
21 words
A digital system according to claim 1 wherein the logic circuit is hyperbolic for rendering the rate of the counter hyperbolic.
Claim 4
Dependent Claim
18 words
A digital system according to claim 1 wherein the rate controlling means is a variable length pulse generator.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-06-21 | 1974-12-21 | 1975-06-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-06-21 | 1978-12-21 | 1979-06-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-06-21 | 1982-12-21 | 1983-06-22 | $7700.00 | Window Closed / Lapsed |