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US3585463A
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Complementary enhancement-type mos transistors
Assignee: Verizon Laboratories Inc
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Filing: 1968-11-25
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Granted: 1971-06-15
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Expires: 1988-11-25
Abstract
Abstract Complementary P-channel enhancement-type MOS transistors are provided on the same conductivity type bulk starting material. The N-channel transistors are dielectrically isolated from the Pchannel transistors to minimize bulk leakage currents and to permit gold doping of the N-channel units. The gold is diffused into the top surface of the N-chnnel units at a point remote from the channel to the limit of its solid solubility in the starting material and insures that the transistor exhibits a positive threshold voltage.
Inventors
- 👤 Paul Richman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 22:46
CPC Classifications
H; H10; H10P; H10P95/00; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D99/00; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/10; Y; Y10; Y10S; Y10S148/00; Y10S148/007; Y10S148/053; Y10S148/085
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
31 words
The complementary pair of MOS transistors in accordance with claim 1, wherein said first high resistivity semiconductor region is gold doped to the limit of the solid solubility of gold therein.
Claim 2
Dependent Claim
31 words
The complementary pair of MOS transistors in accordance with claim 1, wherein said first and second high resistivity semiconductor regions have a resistivity at least as large as 10, 000 ohm-cm.
Claim 3
Dependent Claim
27 words
The complementary pair of MOS transistorS in accordance with claim 1, further comprising second dielectric isolation means separating said second high resistivity semiconductor region from said substrate.
Claim 4
Dependent Claim
24 words
The complementary pair of MOS transistors in accordance with claim 4 wherein said first and second isolation means are separate layers of silicon dioxide.
Claim 5
Dependent Claim
27 words
The complementary pair of MOS transistors in accordance with claim 1, wherein said first and second high resistivity semiconductor regions are formed from the same semiconductor material.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-06-14 | 1974-12-14 | 1975-06-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-06-14 | 1978-12-14 | 1979-06-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-06-14 | 1982-12-14 | 1983-06-15 | $7700.00 | Window Closed / Lapsed |