Master-slave j-k flip-flop

Claim 2

A bistable circuit which comprises: a master flip-flop section having first and second stable states and first and second outputs at which signals representative of said stable states are developed in response to selected input signals; a slave flip-flop section having first and second stable states and first and second outputs at which signals representative of said stable states are developed, said slave flip-flop section including a first switching section and a second switching section each having an input and an output; current steering means for selectively coupling said master flip-flop section and said slave flip-flop section, said current steering means including a first transistor pair and a second transistor pair, said first transistor pair being in circuit relationship with the input of said first switching section, the output of said second switching section and the first output of said master flip-flop section, and said second transistor pair being in circuit relationship with the input of said second switching section, the output of said first switching section and the second output of said master flipflop section; control means in circuit relationship with said first and second transistor pairs and being responsive to selected signal states for initiating a change of state of said slave flip-flop section, said first and second transistor pairs being selectively responsive to states of said control means and to said signals developed at the outputs of said master flip-flop section for selectively switching said slave flip-flop section from one stable state to another stable state.

Claim 3

A bistable circuit as defined in claim 1 wherein said control means is a unidirectional conductive element.

Claim 4

A circuit as defined in claim 1 wherein said current steering transistor pairs each includes a dual transistor having first and second emitter regions, first and second base regions and a common collector region thereby to save space on an integrated circuit monolithic substrate.

Claim 5

A circuit as defined in claim 1 wherein said first switching section and said second switching section of said slave flip-flop each includes a transistor having a base, emitter and collector; and said first and second transistor pairs each includes a first transistor having a base, emitter and collector and a second transistor having a base, emitter and collector, said collectors being common to said first and second transistors of said transistor pairs, the emitter of the first transistor of said first transistor pair being connected to the base of said first switching section transistor the base of the first transistor of said first transistor pair being in circuit relationship with the collector of said second switching section transistor, the emitter of the first transistor of said second transistor pair being connected to the base of said second switching section transistor, the base of the first transistor of said second transistor pair being in circuit relationship with the collector of said first switching section transistor, the base of the second transistor of said first transistor pair being in circuit relationship with the first output of said master flip-flop, the base of the second transistor of said second transistor pair being in circuit relationship with the second output of said master flip-flop, and the emitters of the second transistors of said first and second transistor pairs being in circuit relationship with said control means.

Claim 6

A bistable circuit which comprises: a master flip-flop having first and second stable states of operation and first and second outputs at which signals representative of said stable states are developed in response to input signals in a selected code; a slave flip-flop including first and second switching sections each having mutually exclusive first and second stable states of operation and an output at which signals representative of said stable states are developed, each of said first and second switching sections including a transistor having a base, an emitter and a collector; a first current steering transistor pair in circuit relationship with said first switching section and the first output of said master flip-flop, said first transistor pair including a first transistor having a base, an emitter and a collector and a second transistor having a base, an emitter and a collector, said collectors being common to said first and second transistors, the emitter of said first transistor being connected to the base of said first switching section transistor, the base of said first transistor being in circuit relationship with the collector of said second switching section transistor, and the base of said second transistor being in circuit relationship with the first output of said master flip-flop; a second current steering transistor pair in circuit relationship with said second switching section and the second output of said master flip-flop, said second transistor pair including a first transistor having a base, an emitter and a collector and a second transistor having a base, an emitter and a collector, said collectors being common to said first and second transistors, the emitter of said first transistor being connected to the base of said second switching section transistor, the base of said first transistor being in circuit relationship with the collector of said first switching section transistor, and the base of said second transistoR being in circuit relationship with the second output of said master flip-flop; and control means in circuit relationship with the emitters of the second transistor of said first and second current steering transistor pairs, said control means being responsive to selected states of applied signals for initiating a change of state of said slave flip-flop sections, said second transistors of said current steering transistor pairs being selectively responsive to signals developed at said master flip-flop outputs and to states of conduction of said control means for causing said slave flip-flop sections to switch from one stable state to another stable state.

Claim 7

A bistable circuit which comprises: a master flip-flop having first and second stable states of operation and first and second outputs at which signals representative of said stable states are developed in response to input signals in a selected code; a slave flip-flop including first and second switching sections each having mutually exclusive first and second stable states of operation and an output at which signals representative of said stable states are developed, each of said first and second switching sections including a transistor having a base, an emitter and a collector; a first current steering transistor pair in circuit relationship with said first switching section and the first output of said master flip-flop, said first transistor pair including a first transistor having a base, an emitter and a collector and a second transistor having a base, an emitter and a collector, said collectors being common to said first and second transistors, the emitter of said first transistor being connected to the base of said first switching section transistor, the base of said first transistor being in circuit relationship with the collector of said second switching section transistor, and the base of said second transistor being in circuit relationship with the first output of said master flip-flop; a second current steering transistor pair in circuit relationship with said second switching section and the second output of said master flip-flop, said second transistor pair including a first transistor having a base, an emitter and a collector and a second transistor having a base, an emitter and a collector, said collectors being common to said first and second transistors, the emitter of said first transistor being connected to the base of said second switching section transistor, the base of said first transistor being in circuit relationship with the collector of said first switching section transistor, and the base of said second transistoR being in circuit relationship with the second output of said master flip-flop; and control means in circuit relationship with the emitters of the second transistor of said first and second current steering transistor pairs, said control means being responsive to selected states of applied signals for initiating a change of state of said slave flip-flop sections, said second transistors of said current steering transistor pairs being selectively responsive to signals developed at said master flip-flop outputs and to states of conduction of said control means for causing said slave flip-flop sections to switch from one stable state to another stable state.

Claim 8

A bistable circuit as defined in claim 5 wherein said control means is a unidirectional conductive element.

Claim 9

A circuit as defined in claim 5 wherein said control means is a transistor having a base terminal, a collector terminal and at least one emitter terminal, said base and collector terminals being in circuit relationship with the emitters of said second transistors of said first and second current steering transistor pairs, and said control means transistor being conductively responsive to signal states applied to said at least one emitter terminal.

Claim 10

A circuit as defined in claim 5 wherein said current steering transistor pairs each comprises a dual transistor structure having first and second emitters, first and second bases and a common collector.