Serial bcd adder/subtracter/complementer utilizing interlaced data

Claim 2

A multiple input apparatus for computing data wherein said data at each of said inputs comprises a plurality of words each of ''''N'''' decimal digits, each of said digits being expressed in binary coded decimal format, said data being repetitively interlaced such that the Nth digit of each of 1)the plurality of words is presented followed by the (N-1)th decimal digit of each of said words and wherein each digit is presented by presenting the four binary bits of the BCD code in ascending order and wherein all of said data is so interlaced, comprising: a. first means for sequentially adding or subtracting said input words on a bit-by-bit basis, one decimal digit at a time; said first means generating at its output either sum or difference and carries or borrows; b. storage means dimensioned to accept a number of bits not exceeding the number of bits occurring in any one digit operatively connected to the output of said first means for serially storing said sum or difference output; c. recognition means operatively connected to said sum or difference and carries or borrows outputs of said first means and operatively connected to said storage means to recognize on a digit-by-digit basis an illegal binary coded decimal addition or subtraction result during the operation in said first means; d. generating means operatively connected to said recognition means to generate the number six in BCD form whenever said recognition means recognizes an illegal binary coded decimal addition or subtraction result; e. second means for sequentially adding or subtracting the output of said storage means and said generating means to produce a legal BCD addition or subtraction result, and means responsive to the subtraction result involving a reversal of sign to generate the two''s complement of the subtraction result.

Claim 3

The apparatus as recited in claim 1 including a. means for indicating which of said plurality of words is presently being added or subtracted, and b. a plurality of second storage means operatively connected to receive and store carries or borrows generated by said first means, each of said plurality of second storage means being individually operatively connected to one output of said word indicating means.

Claim 4

The apparatus as set forth in claim 1 wherein said first means comprises a full adder/subtracter.

Claim 5

The apparatus as set forth in claim 1 wherein said second means comprises a full adder/subtracter which is modified so as to generate the two''s complement.

Claim 6

The apparatus as set forth in claim 1 wherein said recognition means comprises a. a first gating network operatively connected to said first means and said storage means which recognizes a sum in excess of 9 but less then 16 and b. storage means to store the output of said first gating network or an output of said first means which is indicative of the generation of a binary carry during the processing of the most significant BCD bits of said digits.

Claim 7

A binary full adder/subtracter having first and second inputs for the input of binary data to be added or subtracted, a third input for the input of carries or borrows which resulted during the addition or subtraction of preceding bits of the same binary word and a fourth input for indicating either addition or subtraction, said adder/subtracter comprising: a. a plurality of first gating means operatively connected to said first, second and third inputs for generating the binary sum or difference; b. a plurality of second gating means operatively connected to said first, second, and fourth inputs for generating carries or borrows; c. means for receiving a complementing signal commanding said adder/subtracter to generate the two''s complement of said data at said first input; and d. means for relaying said complementing sigNal to said plurality of first gating means so as to modify the operation of said plurality of said first gating means.

Claim 8

A binary full adder/subtracter having first and second inputs for the input of binary data to be added or subtracted, a third input for the input of carries or borrows which resulted during the addition or subtraction of preceding bits of the same binary word and a fourth input for indicating either addition or subtraction, said adder/subtracter comprising: a. a plurality of first gating means operatively connected to said first, second and third inputs for generating the binary sum or difference; b. a plurality of second gating means operatively connected to said first, second, and fourth inputs for generating carries or borrows; c. means for receiving a complementing signal commanding said adder/subtracter to generate the two''s complement of said data at said first input; and d. means for relaying said complementing sigNal to said plurality of first gating means so as to modify the operation of said plurality of said first gating means.

Claim 9

The full adder/subtracter as recited in claim 6 including means for generating said complementing signal only when a borrow is detected during the subtraction of the most significant bit of said input data at said first input.

Claim 10

The full one-bit binary adder/subtracter recited in claim 6 wherein said data at said third input is suppressed whenever said complementing signal is present.

Claim 11

A multiple input apparatus for computing data wherein said data at each of said inputs comprises a plurality of words each of ''''N'''' decimal digits, each of said digits being expressed in binary coded decimal format, said data being repetitively interlaced such that the Nth digit of said plurality of words is presented followed by the (N-1)th decimal digit of each of said words and wherein each digit is presented by presenting the four binary bits of the BCD code in ascending order and wherein all of said data is so interlaced, comprising: a. first means for sequentially adding or subtracting said input words on a bit-by-bit basis, one decimal digit at a time; said first means generating at its output either sum or difference and carries or borrows; b. storage means dimensioned to accept a number of bits not exceeding the number of bits occurring in any one digit operatively connected to the output of said first means for serially storing said sum or difference output; c. recognition means operatively connected to said sum or difference and carries or borrows outputs of said first means and operatively connected to said storage means to recognize on a digit-by-digit basis an illegal binary coded decimal addition or subtraction result during the operation in said first means; d. generating means operatively connected to said recognition means to generate the number six in BCD form whenever said recognition means recognizes an illegal binary coded decimal addition or subtraction result; e. second means for sequentially adding or subtracting the output of said storage means and said generating means to produce a legal BCD addition or subtraction result, and means responsive to the subtraction result involving a reversal of sign to generate the two''s complement of the subtraction result; said second means being additionally operative during a subtractive operation when the subtrahend and minuend are numbers containing nonzero representations in only the least significant digit position to generate the two''s complement of the difference and to inhibit the propagation of a borrow to higher order digits only if the subtraction of the representations in the least significant digits positions results in a borrow.

Claim 12

A multiple input apparatus for computing data wherein said data at each of said inputs comprises a plurality of words each of ''''N'''' decimal digits, each of said digits being expressed in binary coded decimal format, said data being repetitively interlaced such that the Nth digit of said plurality of words is presented followed by the (N-1)th decimal digit of each of said words and wherein each digit is presented by presenting the four binary bits of the BCD code in ascending order and wherein all of said data is so interlaced, comprising: a. first means for sequentially adding or subtracting said input words on a bit-by-bit basis, one decimal digit at a time; said first means generating at its output either sum or difference and carries or borrows; b. storage means dimensioned to accept a number of bits not exceeding the number of bits occurring in any one digit operatively connected to the output of said first means for serially storing said sum or difference output; c. recognition means operatively connected to said sum or difference and carries or borrows outputs of said first means and operatively connected to said storage means to recognize on a digit-by-digit basis an illegal binary coded decimal addition or subtraction result during the operation in said first means; d. generating means operatively connected to said recognition means to generate the number six in BCD form whenever said recognition means recognizes an illegal binary coded decimal addition or subtraction result; e. second means for sequentially adding or subtracting the output of said storage means and said generating means to produce a legal BCD addition or subtraction result, and means responsive to the subtraction result involving a reversal of sign to generate the two''s complement of the subtraction result; said second means being additionally operative during a subtractive operation when the subtrahend and minuend are numbers containing nonzero representations in only the least significant digit position to generate the two''s complement of the difference and to inhibit the propagation of a borrow to higher order digits only if the subtraction of the representations in the least significant digits positions results in a borrow.

Claim 13

A multiple input apparatus for computing data wherein said data at each of said inputs comprises a plurality of words each of ''''N'''' decimal digits, each of said digits being expressed in binary coded decimal format, said data being repetitively interlaced such that the Nth digit of each of said plurality of words is presented followed by the (N-1)th decimal digit of each of said words and wherein each digit is presented by presenting the four binary bits of the BCD code in ascending order and wherein all of said data is so interlaced, comprising: a. first means for sequentially adding or subtracting said input words on a bit-by-bit basis, one decimal digit at a time; said first means generating at its output either sum or difference and carries or borrows; b. storage means dimensioned to accept a number of bits not exceeding the number of bits occurring in any one digit operatively connected to the output of said first means for serially storing said sum or difference output; c. recognition means operatively connected to said sum or difference and carries or borrows outputs of said first means and operatively connected to said storage means to recognize on a digit-by-digit basis an illegal binary coded decimal addition or subtraction result during the operation in said first means; d. generating means operatively connected to said recognition means to generate the number six in BCD form whenever said recognition means recognizes an illegal binary coded decimal addition or subtraction result; e. second means for sequentially adding or subtracting the output of said storage means and said generating means to produce a legal BCD addition or subtraction result, and means responsive to the subtraction result involving a reversal of sign to generate the two''s complement of the subtraction result; said second means being additionally operative during a subtractive operation and when both the subtrahend and minuend are numbers containing nonzero representations in only the least significant digit position to generate the two''s complement of the least significant digit of the difference only if the subtraction of the least significant digits results in a borrow.

Claim 14

A multiple input apparatus for computing data wherein said data at each of said inputs comprises a plurality of words each of ''''N'''' decimal digits, each of said digits being expressed in binary coded decimal format, said data being repetitively interlaced such that the Nth digit of each of said plurality of words is presented followed by the (N-1)th decimal digit of each of said words and wherein each digit is presented by presenting the four binary bits of the BCD code in ascending order and wherein all of said data is so interlaced, comprising: a. first means for sequentially adding or subtracting said input words on a bit-by-bit basis, one decimal digit at a time; said first means generating at its output either sum or difference and carries or borrows; b. storage means dimensioned to accept a number of bits not exceeding the number of bits occurring in any one digit operatively connected to the output of said first means for serially storing said sum or difference output; c. recognition means operatively connected to said sum or difference and carries or borrows outputs of said first means and operatively connected to said storage means to recognize on a digit-by-digit basis an illegal binary coded decimal addition or subtraction result during the operation in said first means; d. generating means operatively connected to said recognition means to generate the number six in BCD form whenever said recognition means recognizes an illegal binary coded decimal addition or subtraction result; e. second means for sequentially adding or subtracting the output of said storage means and said generating means to produce a legal BCD addition or subtraction result, and means responsive to the subtraction result involving a reversal of sign to generate the two''s complement of the subtraction result; said second means being additionally operative during a subtractive operation and when both the subtrahend and minuend are numbers containing nonzero representations in only the least significant digit position to generate the two''s complement of the least significant digit of the difference only if the subtraction of the least significant digits results in a borrow.

Claim 15

An arrangement according to claim 10 where said second means also inhibits the propagation of a borrow to higher order digits when the two''s complementing is performed.

Claim 16

A serial binary coded decimal adder/subtracter/complementer comprising first means for substantially simultaneously accepting corresponding bits of first and second binary coded decimal data words in the order of increasing significance of bits and then of digits, second means for indicating that additive or subtractive operations are to be performed, third means responsive to said second means for respectively sequentially performing additive or subtractive operations on said first and second data words, one decimal digit at a time to produce respectively sums or differences thereof, and a fourth means operative during given subtractive operations when the minuend and subtrahend have zeros in all digits positions except the least significant digit position and a borrow indication results from the subtraction of all the bits of the least significant digits of said first and second data words for indicating that the two''s complement of the differences resulting from said subtractive operations is to be generated and fifth means responsive to said fourth means for executing a two''s complementing operation.

Claim 17

A serial binary coded decimal adder/subtracter/complementer comprising first means for substantially simultaneously accepting corresponding bits of first and second binary coded decimal data words in the order of increasing significance of bits and then of digits, second means for indicating that additive or subtractive operations are to be performed, third means responsive to said second means for respectively sequentially performing additive or subtractive operations on said first and second data words, one decimal digit at a time to produce respectively sums or differences thereof, and a fourth means operative during given subtractive operations when the minuend and subtrahend have zeros in all digits positions except the least significant digit position and a borrow indication results from the subtraction of all the bits of the least significant digits of said first and second data words for indicating that the two''s complement of the differences resulting from said subtractive operations is to be generated and fifth means responsive to said fourth means for executing a two''s complementing operation.

Claim 18

An adder/subtracter/complementer as recited in claim 12 containing means effective only during a two''s complementing operation to inhibit the propagation of borrows originating in the subtraction of the two digits of least significance.

Claim 19

An adder/subtracter/complementer as recited in claim 12 comprising storage means to temporarily store at least part of the tentative results of an initial subtractive computation until such time as the results of said subtraction of successive bits indicate whether the two''s complement of the tentative result is to be generated and made available as output data.