Electronic lamp sequencing circuit

Claim 2

In combination: a. an astable multivibrator comprising first and second inverters, and means for cross-coupling said inverters and for causing said first inverter, upon energization of said multivibrator, to become conductive before said second inverter becomes conductive, said first inverter supplying to a first output terminal one output signal when said first inverter is conductive and another output signal when said first inverter is nonconductive, said second inverter supplying to a second output terminal one output signal when said second inverter is conductive and another output signal when said second inverter is nonconductive, b. a first buffer stage comprising a first transistor having an emitter electrode, a base electrode and a collector electrode, first resistive means having a third terminal connected to said emitter electrode and also having a fourth terminal, second resistive means having a fifth terminal connected to said collector electrode and also having a sixth terminal, first capacitive means connected between said third terminal and said sixth terminal, and first signal coupling means coupling said first output terminal of said multivibrator to said base electrode, c. a second buffer stage comprising a second transistor having an emitter electrode, a base electrode and a collector electrode, third resistive means having a seventh terminal connected to said emitter electrode of said second transistor and also having an eighth terminal, fourth resistive means having a ninth terminal connected to said collector electrode of said second transistor and also having a tenth terminal, second capacitive means connected between said seventh terminal and said tenth terminal, and second signal coupling means coupling said second output terminal of said multivibrator to said base electrode of said second transistor, and d. means for simultaneously energizing said multivibrator, applying an operating voltage between said fourth and sixth terminals, and applying an operating voltage between said eighth and tenth terminals, said fifth terminal being an output terminal of said first buffer stage, said ninth terminal being an output terminal of said second buffer stage, said first buffer stage producing an output is final at said fifth terminal only in response to said one output signal of said first inverter and only when said first capacitive means is charged, and said second buffer stage producing an output signal at said ninth terminal only in response to said one output signal of said second inverter and only when said second capacitive means is charged.

Claim 3

The combination of claim 1 wherein each of said inverters said multivibrator comprises a transistor having an emitter connected to a terminal at reference potential and a collector connected to a load resistor, the collector of said transistor of said second inverter being capacitively coupled to the base of said transistor of first inverter, the collector of said transistor of said first inverter being resistively coupled to the base of said transistor of said second inverter.

Claim 4

The combination of claim 1 further including means for indicating the production of said output signal by said first buffer stage and means for indicating the production of said output signal by said second buffer stage.

Claim 5

In a circuit for sequencing the energization of a plurality of lamps, said circuit comprising three lamps, means for supplying a voltage to energize a first of said lamps, and delay means for energizing the second of said lamps and the third of said lamps in sequence after the Inception of and in response to said voltage, the improvement wherein said delay means comprises: a. an astable multivibrator comprising first and second inverters, and means for cross-coupling said inverters and for causing said first inverter, upon energization of said multivibrator by said voltage, to become conductive before said second inverter becomes conductive, said first inverter supplying to a first output terminal one output signal when said first inverter is conductive and another output signal when said first inverter is nonconductive, said second inverter supplying to a second output terminal one output signal when said second inverter is conductive and another output signal when said second inverter is nonconductive, b. a first buffer stage comprising a first transistor having an emitter electrode, a base electrode and a collector electrode, first resistive means having a third terminal connected to said emitter electrode and also having a fourth terminal, second resistive means having a fifth terminal connected to said collector electrode and also having a sixth terminal, first capacitive means connected between said third terminal and said sixth terminal, and first signal coupling means coupling said first output terminal of said multivibrator to said base electrode, c. a second buffer stage comprising a second transistor having an emitter electrode, a base electrode and a collector electrode, third resistive means having a seventh terminal connected to said emitter electrode of said second transistor and also having an eighth terminal, fourth resistive means having a ninth terminal connected to said collector electrode of said second transistor and also having a tenth terminal, second capacitive means connected between said seventh terminal and said tenth terminal, and second signal-coupling means coupling said second output terminal of said multivibrator to said base electrode of said second transistor, d. means for simultaneously supplying said voltage to said multivibrator and for applying said voltage as an operating bias between said fourth and sixth terminals of said first buffer stage and between said eighth and tenth terminals of said second buffer stage, said fifth terminal being an output terminal of said first buffer stage, said ninth terminal being an output terminal of said second buffer stage, said first buffer stage producing an output signal at said fifth terminal only in response to said one output signal of said first inverter and only when said first capacitive means is charged, and said second buffer stage producing an output signal at said ninth terminal only in response to said one output signal of said second inverter and only when said second capacitive means is charged, e. means supplied with and responsive to said output signal of said second buffer stage to energize said second lamp, and f. means supplied with and responsive to said output signal of said first buffer stage to energize said third lamp.

Claim 6

In a circuit for sequencing the energization of a plurality of lamps, said circuit comprising three lamps, means for supplying a voltage to energize a first of said lamps, and delay means for energizing the second of said lamps and the third of said lamps in sequence after the Inception of and in response to said voltage, the improvement wherein said delay means comprises: a. an astable multivibrator comprising first and second inverters, and means for cross-coupling said inverters and for causing said first inverter, upon energization of said multivibrator by said voltage, to become conductive before said second inverter becomes conductive, said first inverter supplying to a first output terminal one output signal when said first inverter is conductive and another output signal when said first inverter is nonconductive, said second inverter supplying to a second output terminal one output signal when said second inverter is conductive and another output signal when said second inverter is nonconductive, b. a first buffer stage comprising a first transistor having an emitter electrode, a base electrode and a collector electrode, first resistive means having a third terminal connected to said emitter electrode and also having a fourth terminal, second resistive means having a fifth terminal connected to said collector electrode and also having a sixth terminal, first capacitive means connected between said third terminal and said sixth terminal, and first signal coupling means coupling said first output terminal of said multivibrator to said base electrode, c. a second buffer stage comprising a second transistor having an emitter electrode, a base electrode and a collector electrode, third resistive means having a seventh terminal connected to said emitter electrode of said second transistor and also having an eighth terminal, fourth resistive means having a ninth terminal connected to said collector electrode of said second transistor and also having a tenth terminal, second capacitive means connected between said seventh terminal and said tenth terminal, and second signal-coupling means coupling said second output terminal of said multivibrator to said base electrode of said second transistor, d. means for simultaneously supplying said voltage to said multivibrator and for applying said voltage as an operating bias between said fourth and sixth terminals of said first buffer stage and between said eighth and tenth terminals of said second buffer stage, said fifth terminal being an output terminal of said first buffer stage, said ninth terminal being an output terminal of said second buffer stage, said first buffer stage producing an output signal at said fifth terminal only in response to said one output signal of said first inverter and only when said first capacitive means is charged, and said second buffer stage producing an output signal at said ninth terminal only in response to said one output signal of said second inverter and only when said second capacitive means is charged, e. means supplied with and responsive to said output signal of said second buffer stage to energize said second lamp, and f. means supplied with and responsive to said output signal of said first buffer stage to energize said third lamp.

Claim 7

A circuit according to claim 4 wherein said means for supplying said voltage is connected to said second and third lamps by the cathode-anode circuits of first and second controlled rectifiers, respectively, said output signals of said first and second buffer stages being supplied to the control electrodes of said second and first controlled rectifiers, respectively.

Claim 8

A circuit according to claim 4 wherein the output of the second of said inverters of said multivibrator is capacitively coupled to the input of the first of said inverters and the output of the first of said inverters is direct-current coupled to the input of the second of said inverters.

Claim 9

A circuit according to claim 4 wherein said first inverter comprises a third transistor of one conductivity type whose collector is connected to said means for supplying said voltage by fifth resistive means and whose emitter is connected to a point at reference potential, said second inverter comprises a fourth transistor of sAid one conductivity type whose collector is connected to said means for supplying said voltage by sixth resistive means and to the base of said third transistor by third capacitive means, whose emitter is connected to said point at reference potential by seventh resistive means and to the base of said third transistor by eighth resistive means, and whose base is connected to the collector of said third transistor by ninth resistive means, said first and second transistors of said first and second buffer stages being of a conductivity type opposite said one conductive type, said sixth and tenth terminals of said first and second buffer stages, respectively, being connected to said point at reference potential, and said first and second signal-coupling means each comprising resistive means, directly coupling said first and second output terminals of said multivibrator to said base electrodes of said first and second transistors, respectively.