Patent US3582713A successfully refreshed from Google Patents.
US3582713A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Overcurrent and overvoltage protection circuit for a voltage regulator
Assignee: TE Connectivity Corp
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Filing: 1970-03-16
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Granted: 1971-06-01
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Expires: 1990-03-16
Abstract
Abstract A combined overload and overvoltage protective circuit for solid state devices which utilizes two transistors in a NOR logic gate configuration that is held normally off by a common emitter bias supplied through a feedback current developed from voltage supplied to a load. Either transistor is switched on to shunt supply current away from solid state devices of the circuit during an overload or input overvoltage condition. In case of overload, excessive load current causes the development of an increased drop across the base-emitter circuit of one transistor countering the hold off bias developed from the feedback current. An input overvoltage causes a Zener diode to conduct and to develop an increased drop across base-emitter of other transistor countering the same hold off bias developed from the feedback current.
Inventors
- 👤 James Peter Till
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 02:59
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/565; G05F1/569; G05F1/571
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
323 words
In a voltage regulated power supply, a current source connected to an amplifying transistor in turn connected to a load, a first voltage divider comprising a control transistor including a first Zener diode connected to said amplifying transistor and to said load to regulate load voltage during normal input voltage and load conditions, a fast-acting combined overload and overvoltage protective circuit means comprising a first switching transistor and a second switching transistor connected in parallel and connected to said current source, a second voltage divider comprising a bias circuit connected directly between the output of said amplifying transistor and the emitters of said first and second switching transistors to develop a feedback current sample of output current to bias both of said switching transistors off during normal input voltage and load conditions independently of the operation of said control transistor and said first Zener diode to regulate a load voltage, a resistor connected in a load current return path to develop a voltage drop causing said first switching transistor to conduct during overload conditions and draw bias currenT from said amplifying transistor to cut back load current, the said bias circuit then operating in response to the reduction in load current to reduce the effective bias to said first switching transistor so as to permit said first switching transistor to remain on until normal load conditions are reestablished, and overvoltage sensing network means connected across said current source and to said second switching transistor, said network means including a second Zener diode and a further resistor connected thereto to develop a voltage drop causing said second switching transistor to conduct during input overvoltage conditions and draw bias current away from said amplifying transistor sufficient to render the said amplifying transistor nonconducting and to reduce the regulated output to zero, thereby protecting the components of said power supply from excessive dissipation, said second switching transistor remaining on until normal input voltage conditions are reestablished.
Claim 2
Dependent Claim
323 words
In a voltage regulated power supply, a current source connected to an amplifying transistor in turn connected to a load, a first voltage divider comprising a control transistor including a first Zener diode connected to said amplifying transistor and to said load to regulate load voltage during normal input voltage and load conditions, a fast-acting combined overload and overvoltage protective circuit means comprising a first switching transistor and a second switching transistor connected in parallel and connected to said current source, a second voltage divider comprising a bias circuit connected directly between the output of said amplifying transistor and the emitters of said first and second switching transistors to develop a feedback current sample of output current to bias both of said switching transistors off during normal input voltage and load conditions independently of the operation of said control transistor and said first Zener diode to regulate a load voltage, a resistor connected in a load current return path to develop a voltage drop causing said first switching transistor to conduct during overload conditions and draw bias currenT from said amplifying transistor to cut back load current, the said bias circuit then operating in response to the reduction in load current to reduce the effective bias to said first switching transistor so as to permit said first switching transistor to remain on until normal load conditions are reestablished, and overvoltage sensing network means connected across said current source and to said second switching transistor, said network means including a second Zener diode and a further resistor connected thereto to develop a voltage drop causing said second switching transistor to conduct during input overvoltage conditions and draw bias current away from said amplifying transistor sufficient to render the said amplifying transistor nonconducting and to reduce the regulated output to zero, thereby protecting the components of said power supply from excessive dissipation, said second switching transistor remaining on until normal input voltage conditions are reestablished.
Claim 3
Dependent Claim
31 words
The voltage regulated power supply of claim 1, further comprising a third Zener diode connected in series between said current source and the junction of said amplifying transistor and said load.
Claim 4
Dependent Claim
18 words
The voltage regulated power supply of claim 1, wherein said bias circuit includes a substantially linear resistance path.
Claim 5
Dependent Claim
264 words
In a voltage regulated power supply, a current source connected to an amplifying transistor in turn connected to a load, a first voltage divider comprising a control transistor including a first Zener diode connected to said amplifying transistor and to said load to regulate load voltage during normal input voltage and load conditions, a fast-acting protective circuit means comprising at least a pair of switching transistors connected together in parallel and connected to said current source, a second voltage divider comprising bias circuit means connected between the output of said amplifying transistor and the emitters of said switching transistors to develop a feedback current sample of output current to bias said switching transistors off during normal input voltage and load conditions independently of the operation of said control transistor and said first Zener diode to regulate a load voltage, resistance means connected in a load current return path for developing a voltage drop causing one of said switching transistors to conduct during overload conditions and draw sufficient bias current away from said amplifying transistor to cut back load current, said one switching transistor being maintained on until normal load conditions are reestablished, a second Zener diode connected to said current source and further resistance means connected to said second Zener diode for developing a voltage drop causing another of said switching transistors to conduct during input overvoltage conditions and draw sufficient bias current away from said amplifying transistor to render it nonconducting and thus reduce the regulated output to zero, said another switching transistor being maintained on until normal input voltage conditions are reestablished.
Claim 6
Dependent Claim
264 words
In a voltage regulated power supply, a current source connected to an amplifying transistor in turn connected to a load, a first voltage divider comprising a control transistor including a first Zener diode connected to said amplifying transistor and to said load to regulate load voltage during normal input voltage and load conditions, a fast-acting protective circuit means comprising at least a pair of switching transistors connected together in parallel and connected to said current source, a second voltage divider comprising bias circuit means connected between the output of said amplifying transistor and the emitters of said switching transistors to develop a feedback current sample of output current to bias said switching transistors off during normal input voltage and load conditions independently of the operation of said control transistor and said first Zener diode to regulate a load voltage, resistance means connected in a load current return path for developing a voltage drop causing one of said switching transistors to conduct during overload conditions and draw sufficient bias current away from said amplifying transistor to cut back load current, said one switching transistor being maintained on until normal load conditions are reestablished, a second Zener diode connected to said current source and further resistance means connected to said second Zener diode for developing a voltage drop causing another of said switching transistors to conduct during input overvoltage conditions and draw sufficient bias current away from said amplifying transistor to render it nonconducting and thus reduce the regulated output to zero, said another switching transistor being maintained on until normal input voltage conditions are reestablished.
Claim 7
Dependent Claim
31 words
The voltage regulated power supply of claim 4, further comprising a third Zener diode connected in series between said current source and the junction of said amplifying transistor and said load.
Claim 8
Dependent Claim
19 words
The voltage regulated power supply of claim 4, wherein said bias circuit means includes a substantially linear resistance path.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-31 | 1974-11-30 | 1975-06-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-31 | 1978-11-30 | 1979-06-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-31 | 1982-11-30 | 1983-06-01 | $7700.00 | Window Closed / Lapsed |