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US3582675A Expired / Lapsed US ⏱️ 0.0 years remaining

Electronic switching arrangement

Assignee: Teledyne Inc
•
Filing: 1968-05-03
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Granted: 1971-06-01
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Expires: 1988-05-03
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Abstract

Abstract Electronic gating or switching arrangement. A first transistor is connected between the output of an amplifier and an output lead; when on, the transistor provides a direct connection between the amplifier and the output lead, when the transistor is off the amplifier is disconnected from the lead. To minimize the ''''full-on'''' resistance of the transistor, a feedback path between the output lead and the input of the amplifier is provided by a second transistor which is turned on when the first is turned on, and off when the first is turned off. Feedback control of the amplifier is provided independently of the two transistors by a resistor connected between the output and input of the amplifier. This arrangement minimizes switching transients, and reduces to negligible amount the impedance presented to the output lead by the amplifier when gated ''''on.

Inventors

  • 👤 William D Jordan Jr
  • 👤 Richard J Gurski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 09:53
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/72; G; G06; G06G; G06G7/00; G06G7/12; G06G7/18; G06G7/184; G06G7/186; G06G7/1865; H03G; H03G1/00; H03G1/0005; H03G1/0035; H03G1/007

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 175 words
A resettable, integrating circuit comprising integrating amplifier means to integrate an input signal, said amplifier means having a high impedance input junction point and an output, gated amplifier means to apply current at low impedance to said junction point and quickly reset the voltage at said output, said gated amplifier means including an amplifier having an input to which can be applied a reset signal and having an output, a first switch transistor connected between said gated amplifier output and said junction point, a second switch transistor connected in a feedback path between said junction point and an input of said gated amplifier, said second transistor when on substantially lowering the impedance of said first transistor when on, the impedances of said first and second transistors when off being effectively open-circuit, first feedback means connected between said gated amplifier output and an input thereof, second feedback means connected between said integrating amplifier output and an input of said gated amplifier, and control means to turn said first and second transistors on together and off together.
Claim 2
Dependent Claim 175 words
A resettable, integrating circuit comprising integrating amplifier means to integrate an input signal, said amplifier means having a high impedance input junction point and an output, gated amplifier means to apply current at low impedance to said junction point and quickly reset the voltage at said output, said gated amplifier means including an amplifier having an input to which can be applied a reset signal and having an output, a first switch transistor connected between said gated amplifier output and said junction point, a second switch transistor connected in a feedback path between said junction point and an input of said gated amplifier, said second transistor when on substantially lowering the impedance of said first transistor when on, the impedances of said first and second transistors when off being effectively open-circuit, first feedback means connected between said gated amplifier output and an input thereof, second feedback means connected between said integrating amplifier output and an input of said gated amplifier, and control means to turn said first and second transistors on together and off together.
Claim 3
Dependent Claim 140 words
In a gated amplifier circuit wherein an amplifier having an input and an output is to be connected to and disconnected from an output lead, a first field effect transistor connected to the output of said amplifier and connected to said lead, a second field effect transistor connected between said lead and the input of the amplifier, said second transistor when on substantially lowering the impedance of said first transistor when on, said first and second transistors when off being substantially open-circuits, feedback means connected between the output and input of said amplifier, said feedback means having a much higher impedance than that of said second transistor when on, said feedback means providing local feedback control of said amplifier when said second transistor is off, and control means to turn said first and second transistors on together and off together.
Claim 4
Dependent Claim 140 words
In a gated amplifier circuit wherein an amplifier having an input and an output is to be connected to and disconnected from an output lead, a first field effect transistor connected to the output of said amplifier and connected to said lead, a second field effect transistor connected between said lead and the input of the amplifier, said second transistor when on substantially lowering the impedance of said first transistor when on, said first and second transistors when off being substantially open-circuits, feedback means connected between the output and input of said amplifier, said feedback means having a much higher impedance than that of said second transistor when on, said feedback means providing local feedback control of said amplifier when said second transistor is off, and control means to turn said first and second transistors on together and off together.
Claim 5
Dependent Claim 54 words
The arrangement in claim 2 in further combination with a third transistor in a parallel path with the first and a fourth transistor in a parallel path with the third, and second control means to turn said third and fourth transistors on together when said first and second transistors are off, and vice versa.
Claim 6
Dependent Claim 24 words
The arrangement in claim 2 wherein said second transistor is in series with a resistor, said resistor adjusting the exact gain of said circuit.
Claim 7
Dependent Claim 145 words
A gating circuit of the character described comprising a differential amplifier having a positive and a negative input and an output, means to apply an input signal to the positive input of said amplifier, an output lead, first transistor switching means connected between said amplifier output and said output lead, said means when on providing a low impedance connection from said amplifier output to said lead, second transistor switching means connected in a first feedback path between said lead and said amplifier negative input, said second switching means when on substantially lowering the impedance of said first switching means, control means to turn said first and second transistor switching means on and off together, and feedback means providing a local control path from said amplifier output to said negative input, whereby low impedance, low transient switching is provided between said amplifier and said output lead.
Claim 8
Dependent Claim 145 words
A gating circuit of the character described comprising a differential amplifier having a positive and a negative input and an output, means to apply an input signal to the positive input of said amplifier, an output lead, first transistor switching means connected between said amplifier output and said output lead, said means when on providing a low impedance connection from said amplifier output to said lead, second transistor switching means connected in a first feedback path between said lead and said amplifier negative input, said second switching means when on substantially lowering the impedance of said first switching means, control means to turn said first and second transistor switching means on and off together, and feedback means providing a local control path from said amplifier output to said negative input, whereby low impedance, low transient switching is provided between said amplifier and said output lead.

References Cited (Backward Citations)

US2999169A Cited
US3231728A Cited
US3129326A Cited
US3320532A Cited
US3435252A Cited
US3378779A Cited
US3406346A Cited
US3476954A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-05-31 1974-11-30 1975-06-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-05-31 1978-11-30 1979-06-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-05-31 1982-11-30 1983-06-01 $7700.00 Window Closed / Lapsed

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