Patent US3827804A successfully refreshed from Google Patents.
Patent US3581300A successfully refreshed from Google Patents.
US3581300A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic actuator and timer circuit
Assignee: Individual
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Filing: 1968-07-19
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Granted: 1971-05-25
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Expires: 1988-07-19
Abstract
Abstract A number of actuator circuits, each having a switch and a capacitor connected in series, are connected to a transformer primary winding. The transformer secondary winding is coupled to a controlled rectifier having a timer capacitor connected to its anode-cathode path. An output circuit is coupled to the timer capacitor. Closing of any one of the switches renders the controlled rectifier conductive to charge the timer capacitor, after which the controlled rectifier is turned off so as to be responsive to closing of another switch. The output circuit produces a signal as long as the timer capacitor has a charge.
Inventors
- 👤 Walter G Eloranta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 08:28
CPC Classifications
G; G08; G08B; G08B23/00; H; H03; H03K; H03K17/00; H03K17/28; H03K17/292; H03K3/00; H03K3/02; H03K3/35; H03K3/352
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
241 words
An improved actuator and timer circuit, comprising: a. positive and negative buses adapted to be connected to a source of direct current; b. a plurality of actuator circuits each comprising a normally open but operable switch connected in a series circuit with a capacitor and resistor connected in parallel; c. a pulse transformer having a primary winding and a coupled secondary winding; d. means connecting said primary winding in series with all of said series circuits between said positive bus and said negative bus; e. a controlled rectifier having an anode, a cathode, and a control electrode; f. a timer capacitor; g. means connecting said anode of said controlled rectifier to said positive bus; h. means connecting said timer capacitor between said cathode of said controlled rectifier and said negAtive bus; i. means connecting said secondary winding of said pulse transformer between said control electrode of said controlled rectifier and said negative bus; j. current amplifying means comprising at least one transistor having an emitter, a base, and a collector; k. means connecting the emitter-collector path of said transistor between said positive bus and said negative bus; 1. a timer resistor connected at one end to the connecting means of said cathode of said controlled rectifier and said timer capacitor, and connected at the other end to said base of said transistor; m. and indicating means connected in series with said emittercollector path of said transistor for producing an output signal.
Claim 2
Dependent Claim
241 words
An improved actuator and timer circuit, comprising: a. positive and negative buses adapted to be connected to a source of direct current; b. a plurality of actuator circuits each comprising a normally open but operable switch connected in a series circuit with a capacitor and resistor connected in parallel; c. a pulse transformer having a primary winding and a coupled secondary winding; d. means connecting said primary winding in series with all of said series circuits between said positive bus and said negative bus; e. a controlled rectifier having an anode, a cathode, and a control electrode; f. a timer capacitor; g. means connecting said anode of said controlled rectifier to said positive bus; h. means connecting said timer capacitor between said cathode of said controlled rectifier and said negAtive bus; i. means connecting said secondary winding of said pulse transformer between said control electrode of said controlled rectifier and said negative bus; j. current amplifying means comprising at least one transistor having an emitter, a base, and a collector; k. means connecting the emitter-collector path of said transistor between said positive bus and said negative bus; 1. a timer resistor connected at one end to the connecting means of said cathode of said controlled rectifier and said timer capacitor, and connected at the other end to said base of said transistor; m. and indicating means connected in series with said emittercollector path of said transistor for producing an output signal.
Claim 3
Dependent Claim
20 words
The improved actuator and timer circuit of claim 1, and further comprising a reset circuit coupled across said timer capacitor.
Claim 4
Dependent Claim
15 words
The improved actuator and timer circuit of claim 1 wherein said timer resistor is variable.
Claim 5
Dependent Claim
20 words
The improved actuator and timer circuit of claim 3, and further comprising a reset circuit coupled across said timer capacitor.
References Cited (Backward Citations)
US3200306A
Cited
US3341717A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-24 | 1974-11-23 | 1975-05-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-24 | 1978-11-23 | 1979-05-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-24 | 1982-11-23 | 1983-05-25 | $7700.00 | Window Closed / Lapsed |