Tone decoder responsive to combined tones

Claim 2

A decoder circuit for selectively responding to frequency signals received from a source of frequency signals comprising, in combination: a source of voltage, an impedance device, first nonconductive means switchable to a conductive state, a first series circuit connecting said first nonconductive means and said impedance device in series with said voltage source, first detector means responsive to a first frequency signal to switch said first nonconductive means to a conductive state, second nonconductive means switchable to a conductive state, second detector means responsive to a second frequency signal to switch said second nonconductive means to a conductive state, third nonconductive means switchable to a conductive state, means responsive to a voltage across said impedance device to switch said third nonconductive means to a conductive state, an output device, a second series circuit connecting said output device and said second and third nonconductive means in series with said voltage source, and means to apply frequency signals from said source of frequency signals to said first and second detector means.

Claim 3

The decoder circuit according to claim 1 wherein said means responsive to a voltage across said impedance device includes energy accumulating means to accumulate energy in response to a voltage across said impedance device and to release said energy to sustain conductivity of said third nonconductive means for a limited time after discontinuance of said voltage across said impedance device.

Claim 4

The decoder circuit of claim 2 including means responsive to said second detector means upon receipt thereof of its selected frequency signal to disable said first detector means.

Claim 5

The decoder circuit of claim 1 wherein said first nonconductive means includes a pair of nonconductive elements each switchable to a conductive state and means connecting said pair in series relation, said first detector means comprises a pair of detector elements responsive to different frequencies present in said first frequency signal, one of said pair of detector elements responding to said first frequency signal to switch one of said pair of nonconductive elements to a conductive state and the other of said pair of detector elements responding to said first frequency signal to switch the other of said nonconductive elements to a conductive state.

Claim 6

The decoder circuit of claim 4 wherein said second nonconductive means comprises a second pair of nonconductive elements and means connecting said second pair in series relation, said second detector means comprising a second pair of detector elements responsive to different frequencies present in said second frequency signal, one of said second pair of detector elements responding to said second frequency signal to switch one of said second pair of nonconductive elements to a conductive state, the other of said second pair of detector elements responding to said second frequency signal to switch the other of said second pair of nonconductive elements to a conductive state.

Claim 7

A decoder circuit for responding to a selected first and second frequencies received from a source of frequencies to energize a load device comprising, in combination: a first nonconductive device switchable to a conductive state, a first frequency detector producing a first output signal on receipt of said first frequency, first means responsive to said first output signal to switch said first device to a conductive state, a second nonconductive device switchable to a conductive state, a second frequency detector producing a second output signal on receipt of said second frequency, secoNd means responsive to said second output signal to switch said second device to a conductive state, said second means including charge accumulating means to delay the switching of said second nonconductive device to its conductive state upon receipt of said second frequency, means applying frequencies from said source to said first and second frequency detectors, a source of voltage, and conductor means connecting said load device and said voltage source in series with said first and second nonconductive devices whereby voltage from said voltage source is applied to said load device upon simultaneous receipt by said first and second detectors of said first and second frequencies for a time sufficient to overcome the delay interposed by said chargeable means.

Claim 8

A decoder circuit for responding to a selected first and second frequencies received from a source of frequencies to energize a load device comprising, in combination: a first nonconductive device switchable to a conductive state, a first frequency detector producing a first output signal on receipt of said first frequency, first means responsive to said first output signal to switch said first device to a conductive state, a second nonconductive device switchable to a conductive state, a second frequency detector producing a second output signal on receipt of said second frequency, secoNd means responsive to said second output signal to switch said second device to a conductive state, said second means including charge accumulating means to delay the switching of said second nonconductive device to its conductive state upon receipt of said second frequency, means applying frequencies from said source to said first and second frequency detectors, a source of voltage, and conductor means connecting said load device and said voltage source in series with said first and second nonconductive devices whereby voltage from said voltage source is applied to said load device upon simultaneous receipt by said first and second detectors of said first and second frequencies for a time sufficient to overcome the delay interposed by said chargeable means.

Claim 9

A decoder circuit for selectively responding to frequency signals received from a source of frequency signals comprising, in combination: a first frequency detector producing a first output signal on receipt of a first frequency, a first nonconductive device switchable to a conductive state, first means responsive to the output signal of said first detector to switch said first device to a conductive state, a second frequency detector producing a second output signal on receipt of a second frequency, a second nonconductive device switchable to a conductive state, second means responsive to the output signal of said second detector to switch said second device to a conductive state, a third frequency detector producing a third output signal on receipt of a third frequency, a third nonconductive device switchable to a conductive state, third means responsive to the output signal of said third detector to switch said third device to a conductive state, a fourth frequency detector producing a fourth output signal on receipt of a fourth frequency, a fourth nonconductive device switchable to a conductive state, fourth means responsive to the output signal of said fourth detector to switch said fourth device to a conductive state, a source of voltage, an impedance device, a first series circuit connecting said first and second devices and said impedance device in series with said voltage source, a fifth nonconductive device switchable to a conductive state, means responsive to a voltage across said impedance device to switch said fifth device to a conductive state, an output load device, a second series circuit connecting said output load device and said third, fourth and fifth devices in series with said voltage source, and means to apply frequency signals from said source of frequency signals to said first, second, third and fourth frequency detectors.

Claim 10

A decoder circuit for selectively responding to frequency signals received from a source of frequency signals comprising, in combination: a first frequency detector producing a first output signal on receipt of a first frequency, a first nonconductive device switchable to a conductive state, first means responsive to the output signal of said first detector to switch said first device to a conductive state, a second frequency detector producing a second output signal on receipt of a second frequency, a second nonconductive device switchable to a conductive state, second means responsive to the output signal of said second detector to switch said second device to a conductive state, a third frequency detector producing a third output signal on receipt of a third frequency, a third nonconductive device switchable to a conductive state, third means responsive to the output signal of said third detector to switch said third device to a conductive state, a fourth frequency detector producing a fourth output signal on receipt of a fourth frequency, a fourth nonconductive device switchable to a conductive state, fourth means responsive to the output signal of said fourth detector to switch said fourth device to a conductive state, a source of voltage, an impedance device, a first series circuit connecting said first and second devices and said impedance device in series with said voltage source, a fifth nonconductive device switchable to a conductive state, means responsive to a voltage across said impedance device to switch said fifth device to a conductive state, an output load device, a second series circuit connecting said output load device and said third, fourth and fifth devices in series with said voltage source, and means to apply frequency signals from said source of frequency signals to said first, second, third and fourth frequency detectors.

Claim 11

The decoder circuit of claim 7 wherein said means responsive to a voltage across said impedance device includes energy accumulating means to accumulate energy in response to a voltage across said impedance device and release said energy to sustain conductivity of said fifth nonconductive device for a limited time after discontinuance of said voltage across said impedance device.

Claim 12

The decoder circuit of claim 7 including means responsive to said third means upon receipt thereof of said third output signal to disable said second means.

Claim 13

A decoder circuit for selectively responding to frequencies received from a source of frequencies, comprising in combination: a first normally nonconductive switchable device, a first frequency detector producing a first output voltage signal on receipt of a selected first frequency, first amplifier means responsive to said first output voltage signal, first coupling means responsive to the output of said first amplifier means to switch said first switchable device to a conductive state, a second normally nonconductive switchable device, a second frequency detector producing a second output voltage signal on receipt of a selected second frequency, second amplifier means responsive to said second output voltage signal, second a selected second frequency, second amplifier means responsive to said second output voltage signal, second coupling means responsive to the output of said second amplifier means to switch said second switchable device to a conductive state, a third normally nonconductive switchable device, a third frequency detector producing a third output voltage signal on receipt of a selected third frequency, third amplifier means responsive to said third output voltage signal, third coupling means responsive to the output of said third amplifier means to switch said third switchable device to a conductive state, a fourth normally nonconductive switchable device, a fourth frequency detector producing a fourth output voltage signal on receipt of a selected fourth frequency, fourth amplifier means responsive to said fourth output voltage signal, fourth coupling means responsive to the output of said fourth amplifier means to switch said fourth device to a conductive state, a source of voltage, an impedance device, a first series circuit connecting said first and second switchable devices and said impedance device in series with said voltage source, a fifth normally nonconductive switchable device, means responsive to a voltage across said impedance device to switch said fifth device to a conductive state, an output load device, a second series circuit connecting said output load device and said third, fourth and fifth switchable devices in series with said voltage source, and means to simultaneously apply frequencies from said source of frequencies to said first, second, third and fourth frequency detectors.

Claim 14

A decoder circuit for selectively responding to frequencies received from a source of frequencies, comprising in combination: a first normally nonconductive switchable device, a first frequency detector producing a first output voltage signal on receipt of a selected first frequency, first amplifier means responsive to said first output voltage signal, first coupling means responsive to the output of said first amplifier means to switch said first switchable device to a conductive state, a second normally nonconductive switchable device, a second frequency detector producing a second output voltage signal on receipt of a selected second frequency, second amplifier means responsive to said second output voltage signal, second a selected second frequency, second amplifier means responsive to said second output voltage signal, second coupling means responsive to the output of said second amplifier means to switch said second switchable device to a conductive state, a third normally nonconductive switchable device, a third frequency detector producing a third output voltage signal on receipt of a selected third frequency, third amplifier means responsive to said third output voltage signal, third coupling means responsive to the output of said third amplifier means to switch said third switchable device to a conductive state, a fourth normally nonconductive switchable device, a fourth frequency detector producing a fourth output voltage signal on receipt of a selected fourth frequency, fourth amplifier means responsive to said fourth output voltage signal, fourth coupling means responsive to the output of said fourth amplifier means to switch said fourth device to a conductive state, a source of voltage, an impedance device, a first series circuit connecting said first and second switchable devices and said impedance device in series with said voltage source, a fifth normally nonconductive switchable device, means responsive to a voltage across said impedance device to switch said fifth device to a conductive state, an output load device, a second series circuit connecting said output load device and said third, fourth and fifth switchable devices in series with said voltage source, and means to simultaneously apply frequencies from said source of frequencies to said first, second, third and fourth frequency detectors.

Claim 15

The decoder circuit of claim 10 wherein means responsive to a voltage across said impedance device includes charge accumulating means accumulating charge in response to a voltage across said impedance device and releasing said charge to sustain conductivity of said fifth switchable device for a limited time after discontinuance of said voltage across said impedance device.

Claim 16

The decoder circuit according to claim 11 including a sixth normally nonconductive switchable device, third circuit means connecting said sixth switchable device across the output of said second amplifier means, and means responsive to the output of said third amplifier means to switch said sixth switchable device to a conductive state, said decoder circuit being so constructed and arranged that said output load device cannot receive a voltage thereacross until after said first and second frequencies have been applied to said first and second frequency detectors and said third and fourth frequencies are applied to said third and fourth frequency detectors during the period of sustained conductivity of said fifth switchable device provided by said charge accumulating means.

Claim 17

The decoder circuit of claim 11 including a seventh normally nonconductive switchable device, a third series circuit connecting said first and seventh switchable devices in series with said voltage source and said output load device, and seventh means responsive to the output of said fourth amplifier means to render said seventh switchable means conductive.

Claim 18

The decoder circuit of claim 13 wherein said seventh means includes charge accumulating means delaying the response of said seventh switchable means to the output of said fourth amplifier means.

Claim 19

The decoder circuit of claim 10 wherein said frequency detectors each comprise a fork having a piezoelectric driving element adhered to one tine thereof and a piezoelectric driven element adhered to another tine thereof, said means to simultaneously apply said frequencies comprising means simultaneously applying said frequencies to said piezoelectric driving elements of said forks, said output voltage signals being generated by said driven piezoelectric elements.