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US3581215A Expired / Lapsed US ⏱️ 0.0 years remaining

Variable frequency delay line differentiator

Assignee: SYSTEMS PERIPHERALS DIVISION
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Filing: 1969-05-22
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Granted: 1971-05-25
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Expires: 1989-05-22
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Abstract

Abstract A circuit for processing a transducer readout signal is disclosed in which a frequency dependent variable length delay line is connected across a double ended output of a signal amplifier.

Inventors

  • 👤 Forrest C Meyer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 22:42
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/10009; H; H03; H03K; H03K5/00; H03K5/153

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 101 words
In a circuit for processing signals developed in a transducer upon passage along a magnetic recording surface in which digital data are recorded in a format wherein the spacing between succeeding magnetic flux reversals is of digital significance, the combination comprising: amplifier means having input terminals connected to the transducer to receive the signal therefrom and having a pair of output terminals receiving the signals through the amplifier means in signal isolation from the input terminals; a frequency selective variable length delay line means connected across the output terminals; and means connected for deriving a signal from across the output terminals.
Claim 2
Dependent Claim 101 words
In a circuit for processing signals developed in a transducer upon passage along a magnetic recording surface in which digital data are recorded in a format wherein the spacing between succeeding magnetic flux reversals is of digital significance, the combination comprising: amplifier means having input terminals connected to the transducer to receive the signal therefrom and having a pair of output terminals receiving the signals through the amplifier means in signal isolation from the input terminals; a frequency selective variable length delay line means connected across the output terminals; and means connected for deriving a signal from across the output terminals.
Claim 3
Dependent Claim 38 words
In the circuit as set forth in claim 1, the delay line comprising a series inductance having two ends, shunt capacitance distributed along the inductance and a capacitor connected across the two ends independently from the shunt capacitance.
Claim 4
Dependent Claim 22 words
In the circuit as set forth in claim 1, the last means including a crossover detector connected to the two output terminals.
Claim 5
Dependent Claim 33 words
In the circuit As set forth in claim 1, the amplifying means including a differential amplifier having its input terminals connected to the transducer and having output terminals connected to the delay line.
Claim 6
Dependent Claim 30 words
In the circuit as set forth in claim 1, the delay line varying in length by less than 25 percent for an octave of frequencies of the transducer output signals.
Claim 7
Dependent Claim 73 words
A differentiator circuit for differentiating signals having variable frequency, and being of the type developed by readout transducers comprising: a differential amplifier having a pair of input terminals connected to receive the signals and having a pair of output terminals in signal isolation from the input terminals; a delay line having frequency selective variable length and being connected across the output terminals; and means for deriving a signal from between said output terminals.
Claim 8
Dependent Claim 73 words
A differentiator circuit for differentiating signals having variable frequency, and being of the type developed by readout transducers comprising: a differential amplifier having a pair of input terminals connected to receive the signals and having a pair of output terminals in signal isolation from the input terminals; a delay line having frequency selective variable length and being connected across the output terminals; and means for deriving a signal from between said output terminals.
Claim 9
Dependent Claim 45 words
A circuit as set forth in claim 6, the delay line comprising a constant delay period delay line, and circuit means connected to the constant period delay line to render the operative delay period of the delay line dependent upon frequency of signals passing through.
Claim 10
Dependent Claim 32 words
A circuit as set forth in claim 7, the delay line comprising a series inductance having two ends, shunt capacitance distributed along the inductance and a capacitor connected across the two ends.
Claim 11
Dependent Claim 32 words
In a circuit as set forth in claim 7, the means for deriving a signal including a crossover detector to provide signals representing occurrence of zero voltage between the two output terminals.
Claim 12
Dependent Claim 31 words
In a circuit as set forth in claim 7, the delay line varying in length less than about 25 percent for an octave frequency variation of the signals to be differentiated.

References Cited (Backward Citations)

US3164815A Cited
US3444473A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-05-24 1974-11-23 1975-05-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-05-24 1978-11-23 1979-05-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-05-24 1982-11-23 1983-05-25 $7700.00 Window Closed / Lapsed

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