Patent US3579816A successfully refreshed from Google Patents.
US3579816A
Expired / Lapsed
US
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Method of producing semiconductor devices
Assignee: GTE Sylvania Inc
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Filing: 1968-12-23
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Granted: 1971-05-25
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Expires: 1988-12-23
Abstract
Abstract Method of producing stacked semiconductor rectifiers by placing a plurality of wafers of semiconductor material in a jig alternately with thin wire spacers. The jig is immersed in molten solder, the spacers are removed from between the wafers, and the jig is removed from the solder. The wafers are pressed together while the solder cools, and the solidified assembly is sawed through each wafer to form a plurality of stacks of dice.
Inventors
- 👤 Robert C Ingraham
- 👤 Hubert J Ramsey
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 10:36
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W90/00
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
84 words
The method of producing semiconductor devices in accordance with claim 1 wherein each of said wafers has a region of semiconductor material of one conductivity type adjacent one major surface and a region of the opposite conductivity type adjacent the opposite major surface, said regions forming a PN junction therebetween parallel to the major surfaces; and said wafers are assembled with the region of the one conductivity type of each wafer adjacent the region of the opposite conductivity type of a wafer adjacent thereto.
Claim 2
Dependent Claim
37 words
The method of producing semiconductor devices in accordance with claim 1 including the step of agitating the assembled plurality of wafers and spacers while the assembled plurality of wafers and spacers is immersed in molten solder material.
Claim 3
Dependent Claim
82 words
The method of producing semiconductor devices in accordance with claim 1 wherein the step of cutting the assembly includes sawing intersecting sets of grooves through the assembly normal to the major surfaces of the wafers to form a plurality of separate elements each including a die of semiconductor material from each wafer of semiconductor material; and including the step of treating the elements in etching material to remove conductive material and semiconductor material disturbed by sawing at the edges of the dice.
Claim 4
Independent Claim
281 words
The method of producing semiconductor devices including the steps of plating each of the major surfaces of a plurality of wafers of semiconductor material having flat, parallel, opposed major surfaces with a layer of nickel; assembling the plurality of wafers of semiconductor material in a predetermined spaced-apart relationship with major surfaces of adjacent wafers in juxtaposition; immersing the assembled plurality of wafers in molten solder material capable of wetting nickel whereby solder material wets the nickel plating on the major surfaces of the wafers; removing the assembled plurality of wafers from the molten solder material; pressing the wafers toward each other while permitting the assembly to cool and solder material between the wafers to solidify; cutting the assembly through each of the wafers generally normal to the major surfaces to form a plurality of separate elements each including a portion of each wafer of semiconductor material; and attaching conducting members to the portions of the wafers of semiconductor material at the ends of the elements; wherein the step of assembling the plurality of wafers of semiconductor material includes alternately placing wafers of semiconductor material and spacers in a jig to form a confined assembly of wafers having a spacer between each wafer and each wafer adjacent thereto, the area of contact of each spacer with the nickel plating on the major surface of a wafer being small relative to the area of the major surface; and including the step of removing the spacers from the assembled plurality of wafers in the jig subsequent to the step of immersing the assembled plurality of wafers and spacers in molten solder material and prior to the step of pressing the wafers toward each other.
Claim 5
Dependent Claim
28 words
The method of producing semiconductor devices in accordance with claim 5 wherein each of said spacers is a generally V-shaped length of wire of generally circular cross section.
Claim 6
Dependent Claim
84 words
The method of producing semiconductor devices in accordance with Claim 5 wherein each of said wafers has a region of semiconductor material of one conductivity type adjacent one major surface and a region of the opposite conductivity type adjacent the opposite major surface, said regions forming a PN junction therebetween parallel to the major surfaces; and said wafers are assembled with the region of the one conductivity type of each wafer adjacent the region of the opposite conductivity type of a wafer adjacent thereto.
Claim 7
Dependent Claim
105 words
The method of producing semiconductor devices in accordance with claim 7 wherein each of said spacers is a generally V-shaped length of nickel wire generally circular cross section; the solder material is a lead-silver solder; the step of cutting the assembly includes sawing intersecting sets of grooves through the assembly normal to the major surfaces of the wafers to form a plurality of separate elements each including a die of semiconductor material from each wafer of semiconductor material; and including the step of treating the elements in etching material to remove conductive material and semiconductor material disturbed by sawing at the edges of the dice.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-24 | 1974-11-23 | 1975-05-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-24 | 1978-11-23 | 1979-05-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-24 | 1982-11-23 | 1983-05-25 | $7700.00 | Window Closed / Lapsed |