Patent US3579123A successfully refreshed from Google Patents.
US3579123A
Expired / Lapsed
US
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Dc restorer apparatus
Assignee: NEC Corp
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Filing: 1969-08-21
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Granted: 1971-05-18
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Expires: 1989-08-21
Abstract
Abstract DC restorer apparatus is provided in accordance with the teachings of the present invention for restoring the DC and low frequency components to a pulse train received in a facsimile or data transmission system. The DC restorer apparatus provided comprises adder means for summing first and second input signals applied thereto and for providing an output signal representative of the received pulse train with the DC and low frequency components restored thereto. The adder means is adapted to have the received pulse train applied to the first input thereof while the output of a feedback loop, which includes both bistable circuit means and low-pass filter means, is applied as the second input thereto. The bistable circuit means is adapted to be driven by the output produced by such adder means and the output of the bistable circuit means is applied through the low-pass filter means to the second input of said adder means. The filtered output of the bistable circuit means is thus added to the received pulse train whereby the DC and low frequency components thereof are restored.
Inventors
- 👤 Hirotoshi Koga
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 14:26
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/06; H04L25/061; H03; H03K; H03K5/00; H03K5/003
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
173 words
DC restorer apparatus comprising: input terminal means adapted to receive an input signal to be subjected to DC restoration; output terminal means adapted to receive a DC restored output signal; adder means for receiving first and second inputs and producing in response thereto a resultant output signal representative of the sum of such first and second inputs, said adder means being connected at a first input thereto to said input terminal means; bistable circuit means capable of assuming first and second states and producing an output signal representative of the state thereof; means for applying said resultant output signal of said adder means to said output terminal means and to said bistable circuit means as an input thereto; and low-pass filter means for passing signal components whose frequency resides below a select cutoff frequency and attenuating signal components whose frequency resides above said cutoff frequency, said low-pass filter means being connected at an input thereto to said bistable circuit means and at an output thereof to said second input of said adder means.
Claim 2
Dependent Claim
173 words
DC restorer apparatus comprising: input terminal means adapted to receive an input signal to be subjected to DC restoration; output terminal means adapted to receive a DC restored output signal; adder means for receiving first and second inputs and producing in response thereto a resultant output signal representative of the sum of such first and second inputs, said adder means being connected at a first input thereto to said input terminal means; bistable circuit means capable of assuming first and second states and producing an output signal representative of the state thereof; means for applying said resultant output signal of said adder means to said output terminal means and to said bistable circuit means as an input thereto; and low-pass filter means for passing signal components whose frequency resides below a select cutoff frequency and attenuating signal components whose frequency resides above said cutoff frequency, said low-pass filter means being connected at an input thereto to said bistable circuit means and at an output thereof to said second input of said adder means.
Claim 3
Dependent Claim
17 words
The DC restorer apparatus according to claim 1 wherein said bistable circuit Means comprises flip-flop circuit means.
Claim 4
Dependent Claim
45 words
The DC restorer apparatus according to claim 2 wherein said means for applying said resultant output signal of said adder means to said output terminal means and to said bistable circuit means includes amplifier means for applying a suitable gain to said resultant output signal.
Claim 5
Dependent Claim
68 words
The DC restorer apparatus according to claim 3 additionally comprising polarity discriminator means for receiving said resultant output signal from said adder means and controlling the state of said flip-flop circuit means in response thereto, said polarity discriminator means being electrically interposed between said means for applying said resultant output signal of said adder means to said bistable circuit means as an input thereto and said input thereto.
Claim 6
Dependent Claim
17 words
The DC restorer apparatus according to claim 4 wherein said flip-flop circuit means comprises bistable multivibrator means.
Claim 7
Dependent Claim
33 words
The DC restorer apparatus according to claim 5 wherein said bistable multivibrator means includes at least two switch means, each of said switch means including individual input means for controlling the state thereof.
Claim 8
Dependent Claim
71 words
The DC restorer apparatus according to claim 6 wherein said polarity discriminator means includes first and second outputs indicative of the polarity of said resultant output signal received thereby, said first output of said polarity discriminator means being connected to said input means of one of said switch means and said second output of said polarity discriminator means being connected to said input means of the other of said switch means.
Claim 9
Dependent Claim
35 words
The DC restorer apparatus according to claim 7 wherein said bistable multivibrator means produces an output signal corresponding to said resultant output signal produced by said adder means but out of phase therewith by 180*.
Claim 10
Dependent Claim
16 words
The DC restorer apparatus according to claim 8 wherein said adder means comprises differential circuit means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-17 | 1974-11-16 | 1975-05-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-17 | 1978-11-16 | 1979-05-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-17 | 1982-11-16 | 1983-05-18 | $7700.00 | Window Closed / Lapsed |