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US3577006A
Expired / Lapsed
US
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Fail-safe pulsed logic and gate
Assignee: Collins Radio Co
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Filing: 1969-03-10
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Granted: 1971-05-04
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Expires: 1989-03-10
Abstract
Abstract A DC logic handling fail-safe pulsed logic AND gate circuit capable of warning the user whenever substantially any single catastrophic component failure occurs inhibiting any of the functions a DC logic circuit is required to perform. It is a multiple input AND gate circuit with the inputs repeatedly pulsed to develop a resulting pulsed output when no input signals are inhibited and there are no circuit disorders within the gate circuit. Biasing circuits within the gate circuit are so subject to bias voltage variation with a signal input inhibit or internal circuit disorder as to inhibit the pulse signal output and thereby warn.
Inventors
- 👤 Leo A Tyrrell
- 👤 Daniel E Castleberry
- 👤 Charles A Weber
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 23:05
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/007
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
277 words
A fail-safe means for monitoring the presence of a plurality of like voltage logic input signals, comprising a plurality of input switching means, a plurality of load members, each of said input switching means being serially connected with an associated one of said plurality of load members between first and second common junctions, each of said input switching means being closed in response to application of an associated one of said plurality of logic input signals, to provide a direct current voltage path between said first and second common junctions, whereby the direct current load between said first and second common junctions is dependent upon the collective operational states of said plurality of input switching means, means for periodically pulsing said input signals at a predetermined duty cycle as applied to said plurality of input switching means, output switching means, said output switching means being responsive to the load established between said first and second common junctions with each of said plurality of input switching means being closed to exhibit a first operational state, said output switching means being responsive to the load defined between said first and second common junctions with each of said plurality of input switching means being open to exhibit a second operational state, said output switching means being responsive to any one of said plurality of input switching means being in a position unlike that of any other one of said plurality of input switching means to remain in one of said output switching means first and second operational states, warning indication means, said last defined static condition of said output switching means comprising an enabling output to said warning indication means.
Claim 2
Dependent Claim
277 words
A fail-safe means for monitoring the presence of a plurality of like voltage logic input signals, comprising a plurality of input switching means, a plurality of load members, each of said input switching means being serially connected with an associated one of said plurality of load members between first and second common junctions, each of said input switching means being closed in response to application of an associated one of said plurality of logic input signals, to provide a direct current voltage path between said first and second common junctions, whereby the direct current load between said first and second common junctions is dependent upon the collective operational states of said plurality of input switching means, means for periodically pulsing said input signals at a predetermined duty cycle as applied to said plurality of input switching means, output switching means, said output switching means being responsive to the load established between said first and second common junctions with each of said plurality of input switching means being closed to exhibit a first operational state, said output switching means being responsive to the load defined between said first and second common junctions with each of said plurality of input switching means being open to exhibit a second operational state, said output switching means being responsive to any one of said plurality of input switching means being in a position unlike that of any other one of said plurality of input switching means to remain in one of said output switching means first and second operational states, warning indication means, said last defined static condition of said output switching means comprising an enabling output to said warning indication means.
Claim 3
Dependent Claim
83 words
A fail-safe monitoring means as defined in claim 1 wherein said output switching means comprises a constant current source, a load means for said constant current source, said current source load means comprising at least said load defined between said first and second common junctions, said output switching means comprising transistor switching means responsive to the voltage dEveloped across said current source load means to exhibit first and second conductivity states corresponding respectively to said output switching means first and second operational states.
Claim 4
Dependent Claim
73 words
A monitoring means as defined in claim 2 wherein said means for periodically pulsing said input signal to said plurality of input switching means comprises a plurality of gating means, each said logic input signal being applied through an associated one of said plurality of gating means to an associated one of said input switching means, and means for simultaneously enabling each of said plurality of gating means at a predetermined periodic rate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-03 | 1974-11-02 | 1975-05-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-03 | 1978-11-02 | 1979-05-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-03 | 1982-11-02 | 1983-05-04 | $7700.00 | Window Closed / Lapsed |