Patent US3575618A successfully refreshed from Google Patents.
US3575618A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for providing an accurately delayed output pulse of accurately predetermined duration
Assignee: Tektronix Inc
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Filing: 1968-07-24
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Granted: 1971-04-20
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Expires: 1988-07-24
Abstract
Abstract An input signal operates a tunnel diode and switches a pair of transistors from a conducting state to a cutoff condition. Each such transistor is provided a capacitor timing circuit coupled to its emitter electrode for restoring conduction in the transistor after a predetermined time, such time period being different for each transistor. The output of each transistor is coupled to an output circuit including a tunnel diode, and when the first of said transistors returns to conduction, the output tunnel diode is triggered. When the second of the transistors returns to a conducting condition, the output circuit is inhibited whereby the tunnel diode output is concluded.
Inventors
- 👤 Frederick Y Kawabata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 20:02
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/313; H03K3/315; H03K5/00; H03K5/13
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
164 words
A delayed pulse generator comprising: input means for receiving an input signal level, output triggerable means, and first and second circuit means responsive to said input means when an input signal level is reached, the first circuit means being responsive to the input means when an input signal level is reached to initiate a first operating period, the second circuit means being responsive to the input means when the same input level is reached to initiate a second operating period, the second operating period associated with the second circuit means being longer than the first operating period associated with the first circuit means, and means coupling said first circuit means for bringing about triggering of said output triggerable means at the end of said first operating period after said input signal level is reached, and means coupling said second circuit means for concluding the output of said triggerable means at the end of said second operating period after said input signal level is reached.
Claim 2
Dependent Claim
164 words
A delayed pulse generator comprising: input means for receiving an input signal level, output triggerable means, and first and second circuit means responsive to said input means when an input signal level is reached, the first circuit means being responsive to the input means when an input signal level is reached to initiate a first operating period, the second circuit means being responsive to the input means when the same input level is reached to initiate a second operating period, the second operating period associated with the second circuit means being longer than the first operating period associated with the first circuit means, and means coupling said first circuit means for bringing about triggering of said output triggerable means at the end of said first operating period after said input signal level is reached, and means coupling said second circuit means for concluding the output of said triggerable means at the end of said second operating period after said input signal level is reached.
Claim 3
Dependent Claim
42 words
The delayed pulse generator according to claim 1 wherein said means coupling said second circuit means for concluding the output of the triggerable means comprises means for inhibiting current supply to said triggerable means at the end of said second operating period.
Claim 4
Dependent Claim
17 words
The delayed pulse generator according to claim 1 wherein said triggerable means comprises an output tunnel diode.
Claim 5
Dependent Claim
59 words
The delayed pulse generator according to claim 1 wherein said first and second circuit means each comprise transistors, each turned off at its base in response to an input signal level, and each having a capacitor charging circuit at its emitter for restoring conduction in each such transistor after a respective operating period for providing the said operating periods.
Claim 6
Dependent Claim
142 words
A delayed pulse generator comprising: first and second current control means, output means for receiving the outputs of said first and second current control means in the normal condition thereof, for producing in response thereto a first level of output, means for simultaneously changing the conducting condition of said first and second current control means, a first timing circuit associated with the first current control means for causing said first current control means to return to its normal condition after a first predetermined time period for causing said output means to produce a second level of output, and a second timing circuit associated with said second current controL means for causing said second current control means to return to its normal condition after a second and longer predetermined time period causing said output means to return to its first level of output.
Claim 7
Dependent Claim
142 words
A delayed pulse generator comprising: first and second current control means, output means for receiving the outputs of said first and second current control means in the normal condition thereof, for producing in response thereto a first level of output, means for simultaneously changing the conducting condition of said first and second current control means, a first timing circuit associated with the first current control means for causing said first current control means to return to its normal condition after a first predetermined time period for causing said output means to produce a second level of output, and a second timing circuit associated with said second current controL means for causing said second current control means to return to its normal condition after a second and longer predetermined time period causing said output means to return to its first level of output.
Claim 8
Dependent Claim
39 words
The delayed pulse generator according to claim 5 wherein said means for simultaneously changing the conducting condition of said first and second control means, and said first and second timing circuits, are referred to the same source of supply.
Claim 9
Dependent Claim
50 words
The delayed pulse generator according to claim 5 wherein said second control means is effective to inhibit said output means so that said first current control means causes the output means to produce the second level of output only before the second current control is returned to its normal condition.
Claim 10
Dependent Claim
41 words
The delayed pulse generator according to claim 5 wherein said means for simultaneously changing the conducting condition of said first and second current control means includes a tunnel diode for providing an initial trigger output in response to an input signal.
Claim 11
Dependent Claim
61 words
The delayed pulse generator according to claim 5 wherein said output means includes a tunnel diode triggered from a first voltage state to a second voltage state when said first current control means returns to its normal condition, and from a second voltage state to a first voltage state when the second current control means also returns to its normal condition.
Claim 12
Dependent Claim
75 words
The delayed pulse generator according to claim 5 wherein each said current control means comprises a transistor including a base electrode, a collector electrode, and an emitter electrode, such transistor receiving a control input on a base electrode and providing an output for coupling to said output means at the collector electrode thereof, the timing circuit associated therewith comprising a capacitor coupled to the transistor''s emitter electrode and a source of supply for said capacitor.
Claim 13
Dependent Claim
40 words
The delayed pulse generator according to claim 10 wherein said means for simultaneously changing the conducting condition of said first and second current control means comprises current switching means referred to the same source of supply as each such capacitor.
Claim 14
Dependent Claim
43 words
The delayed pulse generator according to claim 10 wherein said capacitor is connected to said emitter electrode, and further including a resistor and another transistor having its emitter-collector path in series with said resistor between said emitter electrode and a source of supply.
Claim 15
Dependent Claim
48 words
The delayed pulse generator according to claim 5 wherein said output means includes a first transistor adapted to be operated by said first current control means, and a second transistor for inhibiting operation of said first transistor in response to an output from said second current control means.
Claim 16
Dependent Claim
155 words
A circuit for producing a voltage change delayed by a predetermined period comprising: a transistor including a base electrode, an emitter electrode, and a collector electrode, first means connected to the base electrode of said transistor and responsive to an input signal for changing the voltage at the base of said transistor relative to the voltage at the emitter electrode of said transistor from a first level to a second level for cutting off said transistor, a capacitor and a charging supply circuit therefor coupled to said emitter electrode of said transistor for causing the voltage level of said emitter electrode to change from a first level to a second level after a predetermined time period for restoring conduction in said transistor, and a tunnel diode coupled to the collector electrode of said transistor for switching from a first voltage state to a second voltage state in response to restoration of conduction in said transistor.
Claim 17
Dependent Claim
155 words
A circuit for producing a voltage change delayed by a predetermined period comprising: a transistor including a base electrode, an emitter electrode, and a collector electrode, first means connected to the base electrode of said transistor and responsive to an input signal for changing the voltage at the base of said transistor relative to the voltage at the emitter electrode of said transistor from a first level to a second level for cutting off said transistor, a capacitor and a charging supply circuit therefor coupled to said emitter electrode of said transistor for causing the voltage level of said emitter electrode to change from a first level to a second level after a predetermined time period for restoring conduction in said transistor, and a tunnel diode coupled to the collector electrode of said transistor for switching from a first voltage state to a second voltage state in response to restoration of conduction in said transistor.
Claim 18
Dependent Claim
29 words
The circuit according to claim 14 further including an input tunnel diode responsive to an input signal for operating said means connected to the base electrode of said transistor.
Claim 19
Dependent Claim
33 words
The circuit according to claim 14 wherein said means connected to the baSe electrode of said transistor is returned to the same supply voltage levels as said charging supply circuit for said capacitor.
Claim 20
Dependent Claim
130 words
The circuit according to claim 14 wherein said means connected to the base electrode of said transistor comprises a current switching circuit including a pair of transistors wherein the base electrode of one transistor of said pair is coupled to a first voltage supply level: means coupling the emitter electrodes of said pair of transistors to a second voltage supply level, means coupling the collector electrode of the other of said pair of transistors to the base electrode of the first mentioned transistor, and the charging supply circuit for said capacitor including a fourth transistor having its collector-emitter path coupled between the emitter electrode of the first mentioned transistor and said second voltage supply level, the base electrode of the fourth transistor being coupled to said first voltage supply level.
Claim 21
Dependent Claim
42 words
The circuit according to claim 17 further including an input tunnel diode responsive to an input signal for operating the means connected to the base electrodes of said transistors, and wherein said input signal is referenced to said first voltage supply level.
Claim 22
Dependent Claim
125 words
The circuit according to claim 14 further including a second transistor having a base electrode, an emitter electrode, and a collector electrode, said base electrode of said second transistor being connected for having its voltage level changed by said first means: a capacitor and a charging supply circuit therefor coupled to the emitter electrode of the second transistor for causing the voltage level of said emitter electrode of said second transistor to change from a first level to a second level after a second and longer predetermined time period for restoring conduction in said second transistor, and said tunnel diode being coupled to the collector electrode of the second transistor and responsive to restoration of conduction therein for switching back to a first voltage state.
Claim 23
Dependent Claim
33 words
The circuit according to claim 19 wherein said means connected to the base electrodes of said transistors is returned to the same supply voltage levels as said charging supply circuits for said capacitors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-04-19 | 1974-10-19 | 1975-04-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-04-19 | 1978-10-19 | 1979-04-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-04-19 | 1982-10-19 | 1983-04-20 | $7700.00 | Window Closed / Lapsed |