Data buffer system for transferring information from a first to a second storage medium

Claim 2

In a system for transferring data from a first to a second storage medium, means for sequentially reading lines of data arranged in the form of plural line entries on said first medium, a plurality of byte registers, means responsive to said reading for entering the data read from each line of an entry into a different one of said byte registers, a shift register, means for periodically transferring the data from each of said byte registers sequentially into said shift register, and means for transferring the data comprising each entry as a single binary word from said shift register to said second storage medium.

Claim 3

The system of claim 1 in combination with means responsive to the reception by said shift register of all the data comprising an entry for initiating said transfer to said second medium.

Claim 4

The system of claim 1 in combination with means responsive to the reception by said shift register of a block of data comprising a predetermined number of entries for initiating said transfer of each entry in said block sequentially as a binary word to said second storage medium.

Claim 5

The system of claim 1 in which said means for entering comprises, a read register for temporarily storing on a one line at a time basis each line of data read from said first medium, a distributor having an input and a plurality of output positions, means for transferring each line of data received by said read register to the input of said distributor, means for individually connecting each of said byte registers to a different one of said distributor output positions, and control means responsive to the reception by said read register of the successive lines of data read from said first medium for causing said distributor to transfer the data comprising each line of an entry from said read register to a different one of said byte registers.

Claim 6

The system of claim 4 in which said means for transferring data into said shift register comprises a scanner, and control means for causing said scanner to apply the contents of the currently filled ones of said byte registers sequentially to said shift register.

Claim 7

In a system for transferring data on an interrupt basis from an offline storage medium to the memory of a processor operating in an online mode, means for sequentially reading lines of data arranged in the form of plural line entries on said medium, means responsive to the reading of each entry for converting the data comprising each entry from its plural line format to a single binary word of the same bit capacity, said processor being periodically effective to switch from an online to an interrupt state in which it may receive offline data, means for receiving a signal indicating an interrupt state of said processor, and means responsive to said interrupt signal for applying said converted binary word to said processor, said processor being responsive to each received word for entering it into a unique location in said memory.

Claim 8

In a system for transferring data on an interrupt basis from an offline storage medium to the memory of a processor operating in an online mode, means for sequentially reading lines of data arranged in the form of plural line entries on said medium, means responsive to the reading of each entry for converting the data comprising each entry from its plural line format to a single binary word of the same bit capacity, said processor being periodically effective to switch from an online to an interrupt state in which it may receive offline data, means for receiving a signal indicating an interrupt state of said processor, and means responsive to said interrupt signal for applying said converted binary word to said processor, said processor being responsive to each received word for entering it into a unique location in said memory.

Claim 9

The system of claim 6 in which said means for converting comprises, a plurality of byte registers, mean responsive to said reading for entering the data received from each line of an entry into a different one of said byte registers, a shift register, means for periodically transferring the contents of said byte registers sequentially into said shift register, and means for transferring the data comprising each entry as a single binary word from said shift register to said processor.

Claim 10

The system of claim 7 in which said means for entering comprises, a read register for temporarily storing on a one line at a time basis each line of data read from said medium, a distributor having an input and a plurality of output positions, means for transferring each line of data received by said read register to the input of said distributor, means connecting each of said byte registers to an individual one of said distributor output positions, And control means responsive to the reception by said read register of the successive lines of data read from said medium for causing said distributor to transfer the data comprising each line of an entry from said read register to a different one of said byte registers.

Claim 11

The system of claim 8 in which said means for transferring into said shift register comprises a scanner, and means interconnecting said processor and said scanner for causing said scanner to apply the contents of said byte registers sequentially to said shift register in response to the reception of scan control signals from said processor.

Claim 12

The system of claim 9 in combination with means responsive to the reception by said shift register of all the data comprising an entry for initiating said transfer to said processor.

Claim 13

The system of claim 9 in combination with means responsive to the reception by said shift register of a block of data comprising a predetermined number of entries for initiating said transfer of each entry in said block sequentially as a binary word to said processor.

Claim 14

In a system for transmitting data from a magnetic tape to the memory of a processor controlled system, means for sequentially reading lines of data arranged in the form of plural line entries on said tape, a read register for temporarily storing on a one at a time basis each line of data read from said tape, means for applying each line of data read from said tape to said read register, a distributor having a plurality of output positions, a plurality of byte registers, means for individually connecting each of said byte registers to a different one of said distributor output positions, control means responsive to the reception by said read register of the successive lines of data read from said tape for controlling said distributor to transfer the data comprising each line of an entry from said read register to different one of said byte registers, a scanner, a shift register, means including said scanner for periodically transferring the contents of said byte registers sequentially to said shift register, and means for transferring the data comprising each entry received by said shift register to said memory in parallel form as a single binary word.

Claim 15

In a system for transmitting data from a magnetic tape to the memory of a processor controlled system, means for sequentially reading lines of data arranged in the form of plural line entries on said tape, a read register for temporarily storing on a one at a time basis each line of data read from said tape, means for applying each line of data read from said tape to said read register, a distributor having a plurality of output positions, a plurality of byte registers, means for individually connecting each of said byte registers to a different one of said distributor output positions, control means responsive to the reception by said read register of the successive lines of data read from said tape for controlling said distributor to transfer the data comprising each line of an entry from said read register to different one of said byte registers, a scanner, a shift register, means including said scanner for periodically transferring the contents of said byte registers sequentially to said shift register, and means for transferring the data comprising each entry received by said shift register to said memory in parallel form as a single binary word.

Claim 16

The system of claim 12 in combination with, an input on said distributor, gating means connecting an output of said read register with said input of said distributor, a source of clock pulses, means responsive to the generation of a clock pulse concurrent with the presence of a line of data in said read register for generating a sequence of pulses, means responsive to the generation of the first pulse of a sequence for gating the current contents of said read register to the input of said distributor, said distributor normally being in a reset position in which the data applied to its input is passed therethrough to a first one of its output positions and to the byte register connected thereto, means responsive to the generation of a second pulse of a sequence for advancing the distributor one operative position so that its input is connected to a next one of its output positions and to the byte register connected to said next position and means responsive to the generation of a third pulse of a sequence for resetting said read register prior to its reception of the next line of data read from the tape.

Claim 17

The system of claim 13 in combination with means for resetting said distributor to its reset position prior to the transfer of the contents of said byte registers to said shift register, and means for preventing any data from being entered into one of said byte registers while said scanner is transferring the contents of said byte registers sequentially to said shift register.

Claim 18

The system of claim 14 in which said means for preventing comprises, an overflow register, steering means, means including said steering means responsive to the resetting of said distributor for entering into said overflow register any line of data then received form saId read register by said distributor, and means effective subsequent to the transfer of the contents of said byte registers to said shift register for transferring the contents of said overflow register to the byte register connected to the reset position of said distributor.

Claim 19

The system of claim 14 in which said means for transferring data to said memory comprises, a word counter, means for advancing said counter one position for every n lines of data received by said shift register where n the number of lines in a complete tape entry, and means connecting the output of said word counter to said processor for providing an indication of the number of words currently stored within said shift register.

Claim 20

The system of claim 16 in combination with a second counter, means for advancing said second counter one position for each line of data received by said shift register, means responsive to the reading of a complete data block having a lesser number of words than the capacity of said shift register for adjusting the information in said shift register towards its output end, means for advancing said second counter one position as the data in said shift register is adjusted each step, means including said second counter for providing an indication to said processor when the information in said shift register is fully adjusted towards its output end, and means operable under control of said processor for transferring said contents of said shift register to said processor, said processor being effective to enter the data it receives into said memory.

Claim 21

The system of claim 14 in which said means for transferring the data comprising each entry received by said shift register to said memory comprises, a counter, means for advancing said counter one position for each n lines of data received by said shift register where n the number of lines in a complete tape entry, and means interconnecting said counter and said processor for signifying the presence of a complete tape entry in said shift register, said processor being responsive to said signifying for transferring the contents of said shift register to said memory.

Claim 22

In a system for transmitting data from a magnetic tape to the memory of a processor controlled system, means for sequentially reading lines of data arranged in the form of plural line entries on said tape, a distributor having a plurality of output positions, a plurality of byte registers, means for individually connecting each of said byte registers to a different one of said distributor output positions, means responsive to the reading of the successive lines of data on said tape for causing said distributor to enter the data comprising each line of an entry into a different one of said byte registers, and means for periodically transferring the data comprising each entry from said byte registers to said processor, said processor being effective to enter the data it receives into said memory.

Claim 23

In a system for transmitting data from a magnetic tape to the memory of a processor controlled system, means for sequentially reading lines of data arranged in the form of plural line entries on said tape, a distributor having a plurality of output positions, a plurality of byte registers, means for individually connecting each of said byte registers to a different one of said distributor output positions, means responsive to the reading of the successive lines of data on said tape for causing said distributor to enter the data comprising each line of an entry into a different one of said byte registers, and means for periodically transferring the data comprising each entry from said byte registers to said processor, said processor being effective to enter the data it receives into said memory.

Claim 24

The system of claim 19 in which said means for transferring comprises, a shift register, means for periodically transferring the contents of said byte registers sequentially into said shift register, and means responsive to the receipt of said contents by said shift register for transferring the data comprising each entry as a single binary word.

Claim 25

In a system for transmitting data from a magnetic tape to the memory of a processor controlled system, means for sequentially reading lines of data arranged in the form of plural line entries on said tape, a read register for temporarily storing on a one at a time basis each line of data read from said tape, means for applying each line of data read from said tape to said read register, a distributor having a single input and a plurality of output positions, a plurality of byte registers, means for individually connecting each of said byte registers to a different one of said distributor output positions, means for transferring each line of data received by saId read register to the input of said distributor, means responsive to the reception by said read register of successive lines of data read from said tape for causing said distributor to enter the data comprising each line of an entry into a different one of said byte registers, means for periodically transferring said data out of said byte registers sequentially, and means responsive to said last named transfer for entering the data comprising each entry into said memory in parallel form as a single binary word.

Claim 26

In a system for transmitting data from a magnetic tape to the memory of a processor controlled system, means for sequentially reading lines of data arranged in the form of plural line entries on said tape, a read register for temporarily storing on a one at a time basis each line of data read from said tape, means for applying each line of data read from said tape to said read register, a distributor having a single input and a plurality of output positions, a plurality of byte registers, means for individually connecting each of said byte registers to a different one of said distributor output positions, means for transferring each line of data received by saId read register to the input of said distributor, means responsive to the reception by said read register of successive lines of data read from said tape for causing said distributor to enter the data comprising each line of an entry into a different one of said byte registers, means for periodically transferring said data out of said byte registers sequentially, and means responsive to said last named transfer for entering the data comprising each entry into said memory in parallel form as a single binary word.

Claim 27

The system of claim 21 in combination with, an input on said distributor, gating means connecting an output of said read register with said input of said distributor, a source of clock pulses, means responsive to the generation of a clock pulse concurrent with the presence of a line of data in said read register for generating a sequence of pulses, means responsive to the generation of the first pulse of a sequence for gating the current contents of said read register to the input of said distributor, said distributor normally being in a reset position in which the data applied to its input is passed therethrough to a first one of its output positions and to the byte register connected thereto, means responsive to the generation of a second pulse of a sequence for advancing the distributor one operative position so that its input is connected to a next one of its output positions and to the byte register connected to said next position and means responsive to the generation of a third pulse of a sequence for resetting said read register prior to its reception of the next line of data read from the tape.