Patent US3573571A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3573571A Expired / Lapsed US ⏱️ 0.0 years remaining

Surface-diffused transistor with isolated field plate

Assignee: General Electric Co
•
Filing: 1968-05-01
•
Granted: 1971-04-06
•
Expires: 1988-05-01
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A surface-diffused transistor exhibiting high stability and low collector capacitance includes a metallic field plate buried within an insulating film which covers the active major wafer surface thereof and passivates a surface-adjacent collector junction. Metal field plate is fixed to a negative potential and prevents inversion of a surface-adjacent region of the P-type semiconductor, thereby preventing surface leakage and increased capacitance.

Inventors

  • 👤 Dale M Brown
  • 👤 William E Engeler

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 14:08
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/111; H10D10/00; H10D10/40; H10D10/421; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 13 words
The device of claim 1 wherein said electrical conductor is a metallic film.
Claim 2
Dependent Claim 36 words
The device of claim 2 wherein said one conductivity region is P-type and said metallic film is coincident with the boundary of said P-type region at its intersection with an N-type region at said major surface.
Claim 3
Dependent Claim 69 words
The device of claim 2 wherein said device is a junction transistor having a collector region, a base region surface-diffused into said collector region, and an emitter region surface-diffused into said base region and said buried metallic plate is superposed over said one conductivity type region and one edge thereof is coincident with the intersection of the junction between the collector and base region thereof with said major surface.
Claim 4
Dependent Claim 29 words
The device of claim 2 wherein said device is a PNP surface diFfused transistor, said one conductivity type is a P-type regions, and said fixed electrical potential is negative.
Claim 5
Dependent Claim 30 words
The device of claim 5 wherein said P-type region is the collector and said buried metallic film has an edge coincident with but superposed over the base collector junction thereof.
Claim 6
Dependent Claim 54 words
The device of claim 6 wherein said buried film is laterally bifurcated and constitutes an inner portion and an outer portion surrounding said inner portion and defining therebetween a spacing which substantially defines the lateral extent of a major surface-adjacent portion of said P-type collector having greatly enhanced conductivity and constituting a guard ring.
Claim 7
Dependent Claim 15 words
The device of claim 6 wherein said metal film is permeable to acceptor activator atoms.
Claim 8
Independent Claim 190 words
A method of forming a surface-diffused semiconductor device exhibiting a high degree of stability against surface channel effects due to surface-adjacent majority carrier depletion at the interface thereof with an insulator and including the steps of: a. providing a semiconductor body having a major surface region of one electrical conductivity; b. forming a first insulating film over said major surface region; c. forming a film of a metallic conductor over said insulating film; d. forming a second insulating film over said conducting film; e. forming a pattern over said second insulating film and over said region of one electrical conductivity type; f. removing a portion of said second insulating film and said conducting film to define a diffusion aperture; g. diffusing an opposite conductivity inducing activator through said aperture and into said one conductivity surface region to form an asymmetrically conductive junction between said regions which junction intersects said major surface substantially under the edges of said aperture; h. said aperture defining the extent of said opposite conductivity region automatically registering said conductive film over the remaining surface-adjacent portion of said one-conductivity region and in registry with said junction-surface intersection.
Claim 9
Dependent Claim 17 words
The method of claim 9 wherein said one conductivity region is a collector region of a transistor.

References Cited (Backward Citations)

US3257588A Cited
US3333168A Cited
US3373323A Cited
US3446995A Cited
US3436623A Cited
US3440500A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-04-05 1974-10-05 1975-04-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-04-05 1978-10-05 1979-04-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-04-05 1982-10-05 1983-04-06 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag