Patent US3573502A successfully refreshed from Google Patents.
US3573502A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Subnanosecond current pulse generator
Assignee: Monsanto Co
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Filing: 1968-12-24
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Granted: 1971-04-06
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Expires: 1988-12-24
Abstract
Abstract A pulse generator circuit including a pair of switching transistors and a constant current source coupled to an output terminal by a diode poled to deliver current to the load resistor in response to the switching of the transistor. While the pulse generating circuit is in its standby condition and during a predetermined portion of the switching cycle, the diode isolates the load circuit from the switching circuit. Actuation of the switching transistor and subsequent conduction of the diode produces a pulse waveform having the steep leading and trailing edges at the output terminal.
Inventors
- 👤 David T Kan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 10:30
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/12; H03K5/003
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
156 words
Current pulse-generating circuitry, comprising: a constant current source; load mean; a first diode interconnected between and poled to deliver current from said constant current source to said load means when biased in its forward direction; a switching transistor having its collector coupled to a junction point between said constant current source and said first diode, said switching transistor being operable in response to voltage signals applied between its base and emitter electrodes to switch between a conducting state and a nonconducting state; a biasing potential source; a second diode connected between said biasing potential source and said junction point and forward biased thereby when said switching transistor is in its conducting state; whereby the switching of said transistor from its conducting state to its nonconducting state causes said first diode means to switch from its nonconducting state to its conducting state and thereby deliver current pulses having steep leading and trailing edges to said load means;
Claim 2
Dependent Claim
156 words
Current pulse-generating circuitry, comprising: a constant current source; load mean; a first diode interconnected between and poled to deliver current from said constant current source to said load means when biased in its forward direction; a switching transistor having its collector coupled to a junction point between said constant current source and said first diode, said switching transistor being operable in response to voltage signals applied between its base and emitter electrodes to switch between a conducting state and a nonconducting state; a biasing potential source; a second diode connected between said biasing potential source and said junction point and forward biased thereby when said switching transistor is in its conducting state; whereby the switching of said transistor from its conducting state to its nonconducting state causes said first diode means to switch from its nonconducting state to its conducting state and thereby deliver current pulses having steep leading and trailing edges to said load means;
Claim 3
Dependent Claim
45 words
The circuitry as defined in claim 1, together with: an isolation network coupled between said collector of said switching transistor and a said constant current source; whereby said switching transistor is isolated from the stray capacitance in the output circuit of said constant current source.
Claim 4
Dependent Claim
21 words
The circuitry as defined in claim 2, wherein said isolation network comprises the parallel combination of a resistor and an inductor.
Claim 5
Dependent Claim
94 words
Pulse-generating circuitry, comprising: a current source; an output terminal adapted to be connected to a utilization circuit; a diode interconnecting said current source and said output terminal and poled to deliver current thereto when forward biased; biasing circuit means electrically coupled to said interconnecting diode; switching circuit means electrically connected to said biasing circuit means for selectively causing said biasing circuit means to forward and reverse bias said interconnecting diode; and whereby current pulses may be delivered to said output terminal from said current source by selectively forward and reverse biasing said interconnecting diode.
Claim 6
Dependent Claim
94 words
Pulse-generating circuitry, comprising: a current source; an output terminal adapted to be connected to a utilization circuit; a diode interconnecting said current source and said output terminal and poled to deliver current thereto when forward biased; biasing circuit means electrically coupled to said interconnecting diode; switching circuit means electrically connected to said biasing circuit means for selectively causing said biasing circuit means to forward and reverse bias said interconnecting diode; and whereby current pulses may be delivered to said output terminal from said current source by selectively forward and reverse biasing said interconnecting diode.
Claim 7
Dependent Claim
52 words
A pulse-generating circuit as defined in claim 4, wherein the actuation of said biasing circuit means to forward bias said interconnecting diode is time delayed in the switching of said switching circuit means, thereby to isolate saiD output terminal from said switching circuit means during a predetermined portion of the switching cycle.
Claim 8
Dependent Claim
32 words
The pulse-generating circuitry as defined in claim 4, wherein: said biasing circuit means, comprises; a source of biasing potential; and a diode electrically connecting said biasing potential source and said interconnecting diode.
Claim 9
Dependent Claim
60 words
The pulse-generating circuitry as defined in claim 5, wherein said switching circuit means, comprises; a two stage differential mode switch including two emitter-coupled transistors, one transistor having its base electrode coupled to an input terminal of said pulse generator circuitry and the other transistor having its collector electrode coupled to said biasing circuit diode to selectively control the conduction thereof.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-04-05 | 1974-10-05 | 1975-04-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-04-05 | 1978-10-05 | 1979-04-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-04-05 | 1982-10-05 | 1983-04-06 | $7700.00 | Window Closed / Lapsed |