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US3571675A
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Controlled semi-conductor wafer having adjacent layers of different doping concentrations and charged insert grid
Assignee: BBC Brown Boveri AG Germany
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Filing: 1969-09-24
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Granted: 1971-03-23
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Expires: 1989-09-24
Abstract
Abstract A controlled semiconductor wafer includes at least one p-n junction and adjacently disposed layers of different doping concentration, there being a charged gridlike insert in the layer of lower doping concentration and located in the vicinity of the junction to the adjacent layer of higher doping concentration.
Inventors
- 👤 Werner Faust
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 15:47
CPC Classifications
H; H10; H10D; H10D12/00; H10D12/211; H10D99/00; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/053; Y10S148/139
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
68 words
A semiconductor device as defined in claim 1 for controlling power currents, wherein said wafer of semiconductor material comprises in succession, a highly doped n -type layer, a lower doped n-type layer and a highly doped p -type layer, and wherein said metallic control grid is embedded in and electrically isolated from said lower doped n-type layer in the vicinity of the adjacent highly doped n -type layer.
Claim 2
Dependent Claim
43 words
A semiconductor device as defined in claim 2 for controlling power currents and which further includes a second metallic control grid embedded in and electrically isolated from said lower doped n-type layer in the vicinity of the adjacent highly doped p -type layer.
Claim 3
Dependent Claim
77 words
A semiconductor device as defined in claim 1 for controlling power currents wherein said wafer of semiconductor material comprises in succession a highly doped n -type layer, a lower doped n-type layer, a lower doped p-type layer and a highly doped p -type layer, a first metallic control grid embedded in and electrically isolated from said lower doped n-type layer, and a second metallic control grid embedded in and electrically isolated from said lower doped p-type layer.
References Cited (Backward Citations)
US3370184A
Cited
US3484662A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-03-22 | 1974-09-21 | 1975-03-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-03-22 | 1978-09-21 | 1979-03-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-03-22 | 1982-09-21 | 1983-03-23 | $7700.00 | Window Closed / Lapsed |