Tone detector

Claim 2

A circuit for detecting a tone signal comprising means for receiving an incoming signal, means connected to said receiving means for delaying said received signal for a fixed period of time, means for comparing said received signal with said delayed received signal comprising means for linearly combining said received signal and said delayed received signal, and means responsive to the signal from said linearly combining means for selectively producing a signal indicating the presence of only said tone signal in said incoming signal.

Claim 3

A circuit for detecting a tone signal according to claim 1 wherein said delaying means comprises a delay corresponding to one half cycle of the expected frequency of said tone signal.

Claim 4

A circuit for detecting a tone signal according to claim 2 wherein said linearly combining means comprises means for linearly adding said received and delayed signals and said signal producing means comprises means responsive to the output signal of said adding means being less than a preassigned value signal for producing an output signal.

Claim 5

A circuit for detecting a tone signal according to claim 2 wherein said linear combining means comprises amplifying means having first and second inputs and an output, said first input being connected to said receiving means, said second input being connected to said delaying means, and further comprising means for detecting the peak amplitude of said received signal occurring within each half cycle, and means for detecting the peak amplitude signal from said amplifying means output occurring within said half cycle, and wherein said signal-producing means comprises means for comparing said received signal peak amplitude with said amplifying means output peak amplitude.

Claim 6

A circuit for detecting a tone signal according to claim 4 wherein each of said detecting means further comprises means for storing said detected peak amplitude signal and said signal producing means comprises means for comparing said stored received signal peak amplitude with said stored amplifier output signal peak amplitude.

Claim 7

A circuit for detecting a tone signal according to claim 5 wherein the gain of said amplifying means is fixed at a value permitting direct comparison of said stored peak amplitudes, and said signal-producing means is operative to produce a signal only when the stored peak amplitude of said amplifying means output signal is less than or equal to said stored received signal peak amplitude.

Claim 8

A circuit for detecting a tone signal according to claim 1 wherein said means for receiving an incoming signal comprises means for time sampling said incoming signal and encoding means for converting said sampled signal into a pulse code modulated code corresponding to the value of the amplitude of said incoming signal.

Claim 9

A circuit for detecting a tone signal comprising means for time sampling an incoming signal, encoding means for converting said sampled signal into a pulse code modulated code corresponding to the value of the amplitude of said incoming signal, means for comparing said pulse code modulated code with a pulse code modulated code representative of a prior incoming signal, and means responsive to said comparing means for indicating the presence of only said tone signal in said incoming signal.

Claim 10

A circuit for detecting a tone signal comprising means for time sampling an incoming signal, encoding means for converting said sampled signal into a pulse code modulated code corresponding to the value of the amplitude of said incoming signal, means for comparing said pulse code modulated code with a pulse code modulated code representative of a prior incoming signal, and means responsive to said comparing means for indicating the presence of only said tone signal in said incoming signal.

Claim 11

A circuit for detecting tone signals comprising means for receiving at least one incoming signal, means for repetitively sampling each incoming signal during an associated signal period, means connected to said sampling means for generating successive codes corresponding to successive sampled signals from said sampling means, first means connected to said generating means for detecting and storing the maximum of said generateD codes in each associated signal period, means for delaying successive codes from said generating means for a predetermined time, means for successively adding said delayed codes to said just generated codes, second means connected to said adder for detecting and storing the maximum value code from said adder in each associated signal period, and means for comparing the maximum code from said first means to the maximum code from said second means, said comparing means producing an output signal only when said second means maximum code is less than or equal to said first means maximum code.

Claim 12

A circuit for detecting tone signals comprising means for receiving at least one incoming signal, means for repetitively sampling each incoming signal during an associated signal period, means connected to said sampling means for generating successive codes corresponding to successive sampled signals from said sampling means, first means connected to said generating means for detecting and storing the maximum of said generateD codes in each associated signal period, means for delaying successive codes from said generating means for a predetermined time, means for successively adding said delayed codes to said just generated codes, second means connected to said adder for detecting and storing the maximum value code from said adder in each associated signal period, and means for comparing the maximum code from said first means to the maximum code from said second means, said comparing means producing an output signal only when said second means maximum code is less than or equal to said first means maximum code.

Claim 13

A circuit for detecting tone signals according to claim 9 wherein said receiving means comprises means for receiving a plurality of incoming signals, and time division multiplexing means for sequentially applying at least one cycle of each incoming signal to said sampling means in successive multiplex time intervals.

Claim 14

A circuit for detecting tone signals according to claim 10 wherein said first and second detecting and storing means each further comprises means responsive to said multiplexing means for resetting said stored maximum code at the beginning of each of said multiplex time intervals.

Claim 15

A circuit for detecting tone signals according to claim 11 further comprising means connected to said comparing means responsive to a signal from said multiplex means at the beginning of each of said intervals for inhibiting the operation of said adder and for inhibiting said output signal for said predetermined time.

Claim 16

A circuit for detecting a single frequency sinusoidal signal comprising means for receiving an incoming signal within the voice signal frequency band, means for delaying said incoming signal for one half cycle of said single frequency, first means for comparing said received incoming signal with said delayed incoming signal, means for detecting the peak amplitude of said first comparing means occurring in each half cycle, and means for generating a signal indicative of the presence of only said single frequency sinusoidal signal in said incoming signal comprising means for detecting the peak amplitude of said received incoming signal occurring in each half cycle and second means for comparing said detected incoming signal peak amplitude with the detected peak amplitude derived from said first comparing means.

Claim 17

A circuit for detecting a single frequency sinusoidal signal comprising means for receiving an incoming signal within the voice signal frequency band, means for delaying said incoming signal for one half cycle of said single frequency, first means for comparing said received incoming signal with said delayed incoming signal, means for detecting the peak amplitude of said first comparing means occurring in each half cycle, and means for generating a signal indicative of the presence of only said single frequency sinusoidal signal in said incoming signal comprising means for detecting the peak amplitude of said received incoming signal occurring in each half cycle and second means for comparing said detected incoming signal peak amplitude with the detected peak amplitude derived from said first comparing means.

Claim 18

A circuit for detecting the presence of only a tone signal having a fundamental frequency and odd harmonic frequency components in an incoming signal comprising means for delaying an incoming signal for one half cycle of said fundamental frequency, means for adding said delayed incoming signal and said incoming signal, means for detecting the peak amplitude of said adding means output in each half cycle, means for detecting the peak amplitude of said incoming signal in each half cycle and means for comparing said detected peak amplitude derived from said adding means output signal to said detected incoming signal peak amplitude.

Claim 19

A circuit for detecting the presence of only a tone signal having a fundamental frequency and odd harmonic frequency components in an incoming signal comprising means for delaying an incoming signal for one half cycle of said fundamental frequency, means for adding said delayed incoming signal and said incoming signal, means for detecting the peak amplitude of said adding means output in each half cycle, means for detecting the peak amplitude of said incoming signal in each half cycle and means for comparing said detected peak amplitude derived from said adding means output signal to said detected incoming signal peak amplitude.