Patent US3569688A successfully refreshed from Google Patents.
US3569688A
Expired / Lapsed
US
⏱️ 0.0 years remaining
A multiplier in which a capacitor is charged at a rate proportional to the product of two analogue inputs
Assignee: Audn Corp
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Filing: 1968-12-24
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Granted: 1971-03-09
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Expires: 1988-12-24
Abstract
Abstract A capacitor is charged by a train of pulses derived from a pair of analogue input signals and a feedback amplifier is connected to the capacitor to discharge it at the same rate as it is being charged so that the voltage across the capacitor is held at some fixed level to cause the voltage drop across the feedback path to be proportional to the product of the analogue input signals. One analogue input signal is converted to a digital signal whose frequency is linearly related to the amplitude of the analogue input signal and the other analogue input signal is passed to a pump diode circuit at such frequency whereby a capacitor of the pump diode circuit is charged as stated. Multiplication, division, square root extraction and the sum of plural products are some of the functions which may be performed.
Inventors
- 👤 Thomas A Brendle
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 18:18
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/16; G06G7/161
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
89 words
In a computational circuit, in combination: a capacitor; means for supplying charging current to said capacitor at a rate proportional to the product of a pair of analogue inputs; and an amplifier having an output and having an input connected to said capacitor and including a feedback path from its output to its input for removing the charge on said capacitor at the same rate at which it is charged by said means, whereby the voltage drop across said feedback path is proportional to the product of said inputs.
Claim 2
Dependent Claim
89 words
In a computational circuit, in combination: a capacitor; means for supplying charging current to said capacitor at a rate proportional to the product of a pair of analogue inputs; and an amplifier having an output and having an input connected to said capacitor and including a feedback path from its output to its input for removing the charge on said capacitor at the same rate at which it is charged by said means, whereby the voltage drop across said feedback path is proportional to the product of said inputs.
Claim 3
Dependent Claim
50 words
In the computational circuit according to claim 1 wherein said means supplies charging current to said capacitor proportional to the sum of a plurality of pairs of analogue inputs, whereby the voltage drop across said feedback path is proportional to the sum of the products of said pairs of inputs.
Claim 4
Dependent Claim
71 words
In the computational circuit according to claim 1 including a differential amplifier having the output of said feedback amplifier and a third analogue input as analogue inputs thereto, the output of said differential amplifier being connected to provide one of said pair of analogue inputs whereby the output of said differential amplifier is equal to the quotient of the third analogue input divided by the other of said pair of inputs.
Claim 5
Dependent Claim
62 words
In the computational circuit according to claim 1 including a differential amplifier having the output of said feedback amplifier and a third analogue input as analogue inputs thereto, the output of said differential amplifier being connected to provide both of said pair of analogue inputs whereby the output of said differential amplifier is equal to the square root of said third input.
Claim 6
Dependent Claim
116 words
In the computational circuit according to claim 1 wherein said means comprises an analogue-to-digital device for converting one of said analogue inputs to a digital signal whose frequency is linearly related to the amplitude of said one analogue input, a switch device controlled by said digital signal for passing the other of said analogue inputs at every switch closing, a load resistor receiving the output of said switch device, a second capacitor and diode for charging the second capacitor acRoss said load resistor when said switch device is closed, and a diode coupling said first and second capacitors to transfer the charge on said second capacitor to said first capacitor when said switch device is open.
Claim 7
Dependent Claim
51 words
In the computational circuit according to claim 5 wherein said means supplies charging current to said capacitor proportional to the sum of a plurality of pairs of analogue inputs, whereby the voltage drop across said feedback path is proportional to the sum of the products of said pairs of analogue inputs.
Claim 8
Dependent Claim
71 words
In the computational circuit according to claim 5 including a differential amplifier having the output of said feedback amplifier and a third analogue input as inputs thereto, the output of said differential amplifier being connected to provide one of said pair of analogue inputs whereby the output of said differential amplifier is equal to the quotient of the third analogue input divided by the other of said pair of analogue inputs.
Claim 9
Dependent Claim
62 words
In the computational circuit according to claim 5 including a differential amplifier having the output of said feedback amplifier and a third analogue input as inputs thereto, the output of said differential amplifier being connected to provide both of said pair of analogue inputs whereby the output of said differential amplifier is equal to the square root of said third analogue input.
Claim 10
Dependent Claim
75 words
In the computational circuit, in combination: a capacitor; means for supplying a train of charging pulses to said capacitor, the time-average value of which train is proportional to the product of a pair of analogue inputs; and amplifier means having a feedback path for continuously removing charge from said capacitor at the same rate as is deposited by the first mentioned means, whereby the voltage drop across said feedback path is proportional to said product.
Claim 11
Dependent Claim
75 words
In the computational circuit, in combination: a capacitor; means for supplying a train of charging pulses to said capacitor, the time-average value of which train is proportional to the product of a pair of analogue inputs; and amplifier means having a feedback path for continuously removing charge from said capacitor at the same rate as is deposited by the first mentioned means, whereby the voltage drop across said feedback path is proportional to said product.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-03-08 | 1974-09-07 | 1975-03-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-03-08 | 1978-09-07 | 1979-03-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-03-08 | 1982-09-07 | 1983-03-09 | $7700.00 | Window Closed / Lapsed |