Article-counting apparatus

Claim 2

A counter control circuit for a counter adapted to record a count in response to a count pulse, said circuit comprising means including a first bistable switch for initiating a count pulse when said first switch assumes a first state and terminating said count pulse when said first switch assumes a second state, a second bistable switch adapted to assume first and second states, each of said switches normally being in one of its two states, energizeable means operable when energized to switch said switches to the other of its two states, a thyristor, means connecting said thyristor to said energizeable means so as to provide a first energizing circuit for said energizeable means when said thyristor is rendered conductive, a first sensor, means connecting said first sensor to said thyristor for triggering said thyristor to conduction when a first predetermined condition is sensed by said first sensor, a second sensor, means connecting said second sensor and said second bistable switch to said energizeable means so as to provide a second energizing circuit for said energizeable means when said second bistable switch is in its said other state and a second predetermined condition is sensed by said second sensor, said second bistable switch being connected to said energizeable means in shunt with said thyristor so that said thyristor is rendered nonconductive by said second energizing circuit, whereby count pulses are generated according to the conditions sensed by said sensors.

Claim 3

A counter control circuit according to claim 1 further including indicator means for providing a visual indication each time a count pulse is generated, said indicator means being connected to and controlled by said first bistable switch.

Claim 4

A counter control circuit according to claim 1 further including a counter and means for applying said count pulse to said counter.

Claim 5

A counter control circuit according to claim 1 wherein said energizeable means is a solenoid, and said solenoid and said bistable switches together comprise a relay.

Claim 6

A counter control circuit according to claim 1 wherein said thyristor is a triac having its T1 and T2 electrode terminals connected in series with said energizeable means and its gate electrode terminal connected to said first sensor.

Claim 7

A counter control circuit according to claim 5 wherein said energizeable means is a solenoid.

Claim 8

A counter control circuit according to claim 5 wherein said sensor is a conductive probe, and further wherein said first condition is grounding of said probe.

Claim 9

A counter control circuit according to claim 5 wherein said means for initiating and terminating said count pulse includes a source of DC potential coupled to said first bistable switch.

Claim 10

A circuit for operating a counter of the type adapted to record successive input pulses, said circuit comprising a relay having first and second switches two capable of switching from one to the other of t switching states and a solenoid adapted when energized to cause said switches to shift to selected switching states, a first source of DC potential, a pair of output terminals, means connecting said first switch to said source of DC potential and said output terminals so that the potential across said terminals is at one level when said first switch is in one of its states and at a second level when said first switch is in the other of its states, whereby with said terminals connected to a counter switching of said first switch from said first state to said second state and back to said first state produces a pulse input to said counter, a second source of potential, means including a thyristor and said second source connected in series with said solenoid for providing a first energizing circuit for said solenoid when said thyristor is rendered conductive, said thyristor having a gate electrode, means including a first sensor connected to said gate elEctrode for biasing said thyristor to conduction when said sensor is in the first of two states, and means including a second sensor and said second switch connected in series with said solenoid and said second source for providing a second energizing circuit for said solenoid when said second switch is in one of its states and said sensor is in the first of two given states, said second energizing circuit when established serving to prevent conduction of said thyristor, whereby said thyristor is rendered conductive only when said first sensor is in its first state while said second sensor is not in its first state and an input pulse to said counter is produced only if said thyristor is rendered nonconductive by said second switch being in said first state and said solenoid is deenergized by said second switch switching out of its said first state.

Claim 11

A circuit for operating a counter of the type adapted to record successive input pulses, said circuit comprising a relay having first and second switches two capable of switching from one to the other of t switching states and a solenoid adapted when energized to cause said switches to shift to selected switching states, a first source of DC potential, a pair of output terminals, means connecting said first switch to said source of DC potential and said output terminals so that the potential across said terminals is at one level when said first switch is in one of its states and at a second level when said first switch is in the other of its states, whereby with said terminals connected to a counter switching of said first switch from said first state to said second state and back to said first state produces a pulse input to said counter, a second source of potential, means including a thyristor and said second source connected in series with said solenoid for providing a first energizing circuit for said solenoid when said thyristor is rendered conductive, said thyristor having a gate electrode, means including a first sensor connected to said gate elEctrode for biasing said thyristor to conduction when said sensor is in the first of two states, and means including a second sensor and said second switch connected in series with said solenoid and said second source for providing a second energizing circuit for said solenoid when said second switch is in one of its states and said sensor is in the first of two given states, said second energizing circuit when established serving to prevent conduction of said thyristor, whereby said thyristor is rendered conductive only when said first sensor is in its first state while said second sensor is not in its first state and an input pulse to said counter is produced only if said thyristor is rendered nonconductive by said second switch being in said first state and said solenoid is deenergized by said second switch switching out of its said first state.

Claim 12

A counter control circuit for a counter adapted to record a count in response to the trailing edge of a pulse, said circuit comprising a first bistable means for initiating a counter input pulse when in the first of its two states and for terminating said input pulse when in the second of its two states, second bistable switching means capable of assuming either of first and second states, energizeable control means for both said bistable means, means connecting said energizeable control means and both said bistable means so that both said bistable means switch to said second states when said control means is energized and switch to said first states when said control means is deenergized, a first normally open energizing circuit for said energizeable control means including a thyristor, said first energizing circuit adapted to be completed when said thyristor is rendered conductive, first sensing means adapted to trigger said thyristor to conduction when a first given condition is sensed, a second energizing circuit for said energizeable control means, said second energizing circuit including said second bistable means and a second sensor, said second energizing circuit being completed when said second bistable means is in its second state and a second given condition is sensed by said second sensor, said second energizing circuit being in parallel with said first energizing circuit so as to shunt said thyristor when said second energizing circuit is completed, whereby completion of said second energizing circuit renders said thyristor nonconductive so long as said second condition subsists.

Claim 13

A counter control circuit for a counter adapted to record a count in response to the trailing edge of a pulse, said circuit comprising a first bistable means for initiating a counter input pulse when in the first of its two states and for terminating said input pulse when in the second of its two states, second bistable switching means capable of assuming either of first and second states, energizeable control means for both said bistable means, means connecting said energizeable control means and both said bistable means so that both said bistable means switch to said second states when said control means is energized and switch to said first states when said control means is deenergized, a first normally open energizing circuit for said energizeable control means including a thyristor, said first energizing circuit adapted to be completed when said thyristor is rendered conductive, first sensing means adapted to trigger said thyristor to conduction when a first given condition is sensed, a second energizing circuit for said energizeable control means, said second energizing circuit including said second bistable means and a second sensor, said second energizing circuit being completed when said second bistable means is in its second state and a second given condition is sensed by said second sensor, said second energizing circuit being in parallel with said first energizing circuit so as to shunt said thyristor when said second energizing circuit is completed, whereby completion of said second energizing circuit renders said thyristor nonconductive so long as said second condition subsists.