Abstract Multiplex messages are transmitted from a master station through a plurality of intermediate stations and back to the master via a main channel. A standby channel provides for transmission in the opposite direction. If a station detects received message failure in the main channel it initiates a switchover operation in which the preceding station switches received messages to the standby channel. The switched messages pass back through the master to the initiating station, and the initiating station returns them to the master via the main channel. Modem clock signals are switched to maintain synchronous operation and failure of a modem results in a switchover operation. Provision is made for operation alternatively at higher and lower bit transmission rates, while retaining the same message length. Special connections for predetermined message cells allow communication between intermediate stations.
Inventors
👤 Peter W Bersin
👤 Frank W Sieracki
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-23 13:06
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/74; H04B1/745
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
144 words
A digital communication system comprising: sending and receiving stations and an intermediate station; b. a communication channel serially connecting said stations for transmission of digitally coded multiplex messages; c. each message including a distinctive sync pattern and a plurality of character cells each containing a plurality of bit intervals; d. means for transmitting said multiplex messages alternatively at a higher and at a lower bit rate; e. multiplexing and demultiplexing means at said intermediate station for inserting data in said cells and deriving data therefrom; f. counting means at said stations for counting said cells and producing corresponding cell addresses; g. means responsive to said cell addresses for controlling said multiplexing and demultiplexing means, and h. skip means operative upon transmission of messages at said lower bit rate to advance said counting means rapidly at predetermined counts thereof to effectively skip predetermined cell addresses.
Claim 2
Dependent Claim
144 words
A digital communication system comprising: sending and receiving stations and an intermediate station; b. a communication channel serially connecting said stations for transmission of digitally coded multiplex messages; c. each message including a distinctive sync pattern and a plurality of character cells each containing a plurality of bit intervals; d. means for transmitting said multiplex messages alternatively at a higher and at a lower bit rate; e. multiplexing and demultiplexing means at said intermediate station for inserting data in said cells and deriving data therefrom; f. counting means at said stations for counting said cells and producing corresponding cell addresses; g. means responsive to said cell addresses for controlling said multiplexing and demultiplexing means, and h. skip means operative upon transmission of messages at said lower bit rate to advance said counting means rapidly at predetermined counts thereof to effectively skip predetermined cell addresses.
Claim 3
Dependent Claim
188 words
A system according to claim 1 including: a. message register means at said intermediate station for receiving said multiplex messages and transmitting corresponding messages; b. multiplex shift register means in said multiplexing means for receiving character data to be inserted in said messages: c. demultiplex shift register means in said demultiplexing means for receiving data from said messages; d. means for actuating said skip means in a skip interval allocated to the beginning of a cell interval: e. means for transferring data from said message register means to said demultiplex shift register means in a demux transfer interval following said skip interval; f. means for shifting character data into said multiplex shift register means and means for shifting character data out of said demultiplex shift register means during a clock interval following said demux interval; g. and means for transferring data from said multiplex shift register means to said message register means in a mux transfer interval following said clock interval; and h. said skip, demux, transfer, clock and mux transfer intervals being predetermined to occur during the presence of the corresponding cell in said message register means.