Patent US3566218A successfully refreshed from Google Patents.
US3566218A
Expired / Lapsed
US
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Multiple base width integrated circuit
Assignee: National Semiconductor Corp
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Filing: 1968-10-02
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Granted: 1971-02-23
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Expires: 1988-10-02
Abstract
Abstract A novel high-performance monolithic integrated circuit means including semiconductive transistor elements having different base widths so that one or more of the transistors have a high voltage breakdown characteristic, while one or more of the remaining transistors have a high current gain characteristic. This is accomplished by diffusing certain regions of selected ones of the respective transistors for longer periods of time than like regions of the other transistors so as to render the base widths of certain ones of the transistors of lesser thickness than those of the remaining transistors.
Inventors
- 👤 Robert J Widlar
- 👤 David V Talbert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 08:09
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0112; H10D84/02; H10D84/03; H10D84/038; H10D84/60; H10D84/641; H10D84/642; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/038; Y10S148/085; Y10S148/087; Y10S148/099; Y10S148/151; Y10S148/167
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
258 words
A monolithic integrated circuit comprising: a body of semiconductive material; first transistor means formed in said body and including a first collector region of a first conductivity type, a first base region of a second conductivity type formed in said first collector region and defining a first PN junction therebetween, and a first emitter region of said first conductivity type formed in said first base region and defining a second PN junction therebetween, said first transistor means having a first base width defined by the separation between said first and second PN junctions; second transistor means formed in said body and including a second collector region of said first conductivity type, a second base region of said second conductivity type formed in said second collector region and defining a third PN junction therebetween having a junction depth substantially equal to the junction depth of said first PN junction, and a second emitter region of said first conductivity type formed in said second base region and defining a fourth PN junction therebetween, said second transistor means having a second base width defined by the separation between said third and fourth PN junctions, said first base width being substantially smaller than said second base width so that said first transistor means has a substantially higher current gain characteristic than said second transistor means; and conductor means interconnecting said first and second transistor means whereby said first transistor means forms an input stage for said integrated circuit and said second transistor means provides voltage overload protection for said first transistor means.
Claim 2
Dependent Claim
257 words
A monolithic integrated circuit comprising: a body of semiconductive material; first transistor means formed in said body and including a first collector region of a first conductivity type, a first base region of a second conductivity type formed in said first collector region and defining a first PN junction therebetween, and a first emitter region of said first conductivity type formed in said first base region and defining a second PN junction therebetween, said first transistor means having a first base width defined by the separation between said first and second PN junctions; second transistor means formed in said body and including a second collector region of said first conductivity type, a second base region of said second conductivity type formed in said second collector region and defining a third PN junction therebetween, and a second emitter region of said first conductivity type formed in said second base region and defining a fourth PN junction therebetween having a junction depth substantially equal to the junction depth of said second PN junction, said second transistor means having a second base width defined by the separation of said third and fourth PN junctions, said second base width being substantially larger than said first base width so that said second transistor means has a substantially higher breakdown pOtential than said first transistor means; and Conductor means interconnecting said first and second transistor means whereby said first transistor means forms an input stage for said integrated circuit and said second transistor means provides voltage overload protection for said first transistor means.
Claim 3
Dependent Claim
258 words
A monolithic integrated circuit comprising a body of semiconductive material: first transistor means formed in said body and including a first collector region of a first conductivity type, a first base region of a second conductivity type formed in said first collector region and defining a first PN junction therebetween, and a first emitter region of said first conductivity type formed in said first base region and defining a second PN junction therebetween, said first transistor means having a first base width defined by the separation between said first and second PN junctions; second transistor means formed in said body and including a second collector region of said first conductivity type, a second base region of said second conductivity type formed in said second collector region and defining a third PN junction therebetween, and a second emitter region of said first conductivity type formed in said second base region and defining a fourth PN junction therebetween having a junction depth substantially equal to the junction depth of said second PN junction, said second transistor means having a second base width defined by the separation between said third and fourth PN junctions, said first base width being substantially smaller than said second base width so that said first transistor means has a substantially higher current gain characteristic than said second transistor means; and conductor means interconnecting said first and second transistor means whereby said first transistor means forms an input stage for said integrated circuit and said second transistor means provides voltage overload protection for said first transistor means.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-02-22 | 1974-08-24 | 1975-02-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-02-22 | 1978-08-24 | 1979-02-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-02-22 | 1982-08-24 | 1983-02-23 | $7700.00 | Window Closed / Lapsed |