Signal translating circuit having first and second pairs of semiconductor devices with matching conduction characteristics
Abstract
Abstract A SIGNAL TRANSLATING CIRCUIT PARTICULARLY WELL SUITED FOR FABRICATION AS AN INTEGRATED CIRCUIT WHICH PROVIDES AN OUTPUT SIGNAL REPRESENTATIVE OF A DIFFERENCE BETWEEN TWO INPUT SIGNALS, THE OUTPUT SIGNAL BEING REFERENCED TO A PREDETERMINED DIRECT VOLTAGE LEVEL SUBSTANTIALLY INDEPENDENT OF THE DIRECT VOLTAGE LEVELS OF THE INPUT SIGNALS, FIRST AND SECOND PAIRS OF SEMICONDUCTORS DEVICES, THE DEVICES IN EACH PAIR HAVING MATCHED CONDUCTION CHARACTERISTICS, ARE SUPPLIED WITH FIRST AND SECOND INPUT SIGNALS. THE FIRST INPUT SIGNAL IS COUPLED BY AN IMPEDANCE TO A JUNCTION BETWEEN THE FIRST AND SECOND DEVICES OF THE FIRST PAIR AND THE SECOND DEVICE OF THE SECOND PAIR. THE SECOND INPUT SIGNAL IS COUPLED BY A FURTHER IMPEDANCE TO A JUNCTION BETWEEN THE FIRST AND SECOND DEVICES OF THE SECOND PAIR. AN OUTPUT SIGNAL WHICH IS A FUNCTION OF THE DIFFERENCE BETWEEN THE INPUT SIGNALS IS DERIVED ACROSS AN OUTPUT IMPEDANCE COUPLED TO THE FIRST DEVICE OF THE FIRST PAIR.
Inventors
- 👤 Allen L Limberg
Bibliographic Details
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-02-15 | 1974-08-17 | 1975-02-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-02-15 | 1978-08-17 | 1979-02-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-02-15 | 1982-08-17 | 1983-02-16 | $7700.00 | Window Closed / Lapsed |