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US3564227A Expired / Lapsed US ⏱️ 0.0 years remaining

Computer and accumulator therefor incorporating push down register

Assignee: Potter Instrument Co Inc
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Filing: 1967-12-14
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Granted: 1971-02-16
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Expires: 1987-12-14
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Abstract

Abstract This specification discloses a stored program digital computer, including an accumulator which also functions as a push down storage register. The first stage of the accumulator functions as a conventional accumulator adding or subtracting the binary numbers represented by applied signals from the numbers stored therein leaving the results of the addition or subtraction in the first stage. Also, the results of multiplication operations are stored in the first stage of the accumulator. When a number is transferred to the accumulator from the memory of the computer, it is stored in the first stage of the accumulator and the number that is stored in the first stage is shifted to the second stage of the accumulator. The binary numbers, if any, stored in the second and higher numbered accumulator stages are shifted to the next higher numbered accumulator stage. The binary numbers may be transferred from the first stage of the accumulator to the memory and when such a transfer is made, the numbers stored in the second and higher numbered accumulator stages are shifted to the next lower numbered accumulator stage. In addition, the accumulator can be controlled to add or subtract the contents of the second accumulator stage from the first accumulator stage. When such addition or subtraction takes place, the numbers stored in the third and higher numbered accumulator stages are each shifted to the next lower numbered accumulator stage.

Inventors

  • 👤 Dan M Bowers

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 13:25
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/50; G06F7/505; G06F9/00; G06F9/06; G06F9/30; G06F9/34

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 137 words
A computer comprising a memory capable of storing a plurality of numbers, an accumulator including first through nth stages each capable of storing a number and including means to perform arithmetic operations on the number stored in the first accumulator stage, and means to transfer numbers between said memory and the first stage of said accumulator, said accumulator including means operable upon the transfer of a number from the first accumulator stage to said memory to shift the numbers if any stored in the second through nth accumulator stages to the first through (n-1)th accumulator stages respectively, and operable when a number is being transferred from said memory to the first accumulator stage to shift the numbers if any stored in the first through (n-1)th stages of said accumulator to the second through nth accumulator stages respectively.
Claim 2
Dependent Claim 137 words
A computer comprising a memory capable of storing a plurality of numbers, an accumulator including first through nth stages each capable of storing a number and including means to perform arithmetic operations on the number stored in the first accumulator stage, and means to transfer numbers between said memory and the first stage of said accumulator, said accumulator including means operable upon the transfer of a number from the first accumulator stage to said memory to shift the numbers if any stored in the second through nth accumulator stages to the first through (n-1)th accumulator stages respectively, and operable when a number is being transferred from said memory to the first accumulator stage to shift the numbers if any stored in the first through (n-1)th stages of said accumulator to the second through nth accumulator stages respectively.
Claim 3
Dependent Claim 40 words
A computer as recited in claim 1 wherein said accumulator includes means to add the number stored in the second accumulator stage to the contents of the first accumulator stage with the result being stored in the first accumulator stage.
Claim 4
Dependent Claim 53 words
A computer as recited in claim 2 wherein said accumulator includes means operable upon the adding of the number stored in the second accumulator stage to the contents of the first accumulator stage to shift the numbers stored in the third through nth accumulator stages to the second through (n-1)th accumulator stages respectively.
Claim 5
Dependent Claim 39 words
A computer as recited in claim 2 wherein said computer includes means to subtract the number stored in the second accumulator stage from the contents of the first accumulator stage with the result stored in the first accumulator stage.
Claim 6
Dependent Claim 54 words
A computer as recited in claim 4 wherein said accumulator includes means operable when the number stored in the second accumulator stage is added or subtracted from the contents of the first accumulator stage to shift the numbers stored in the third through nth accumulator stages to the second through (n-1)th accumulator stages respectively.
Claim 7
Dependent Claim 50 words
A computer as recited in claim 1 wherein said means to perform arithmetic operations on the number stored in said first accumulator stage comprises means to add a number transferred from said memory to the contents of the first accumulator stage with the result stored in said first accumulator stage.
Claim 8
Dependent Claim 48 words
A computer as recited in claim 6 wherein said means to perform arithmetic operations on the number stored in the first accumulator stage further comprises means to subtract a number transferred from said memory to the first accumulator stage with the results stored in the first accumulator stage.
Claim 9
Dependent Claim 42 words
A computer as recited in claim 7 wherein said computer includes means to multiply a number transferred from said memory times the number stored in the first accumulator stage with the results of the multiplication being stored in said first accumulator stage.
Claim 10
Dependent Claim 48 words
A computer as recited in claim 1 including means to control said accumulator, said memory, and said means to transfer data between said accumulator and said memory to perform operations, including arithmetic operations and the transfer of data between said memory and said accumulator, in a selected sequence.
Claim 11
Dependent Claim 155 words
An accumulator comprising first through nth stages each capable of storing a binary number, each of said stages comprising a plurality of orders each capable of storing a binary digit, each of said orders comprising a bistable storage unit having first and second stable states and storing binary ones and zeros by being in said first and second stable states respectively, means to perform arithmetic operations on the binary number stored in the first stage, means to transfer binary numbers to and from said first stage, and means operable upon the transfer of a binary number from the first stage to shift the binary numbers, if any, stored in the second through nth stages to the first through (n-1)th stages respectively and operable when a binary number is being transferred to the first stage to shift the binary numbers, if any, stored in tHe first through (n-1)th stages to the second through nth stages respectively.
Claim 12
Dependent Claim 155 words
An accumulator comprising first through nth stages each capable of storing a binary number, each of said stages comprising a plurality of orders each capable of storing a binary digit, each of said orders comprising a bistable storage unit having first and second stable states and storing binary ones and zeros by being in said first and second stable states respectively, means to perform arithmetic operations on the binary number stored in the first stage, means to transfer binary numbers to and from said first stage, and means operable upon the transfer of a binary number from the first stage to shift the binary numbers, if any, stored in the second through nth stages to the first through (n-1)th stages respectively and operable when a binary number is being transferred to the first stage to shift the binary numbers, if any, stored in tHe first through (n-1)th stages to the second through nth stages respectively.
Claim 13
Dependent Claim 36 words
An accumulator as recited in claim 10 and further comprising means to add the numbers stored in the second stage to the contents of the first stage with the result being stored in the first stage.
Claim 14
Dependent Claim 48 words
An accumulator as recited in claim 11 and further comprising means operable upon the adding of the number stored in the second stage to the contents of the first stage to shift the numbers stored in the third through nth stages to the second through (n-1)th stages respectively.
Claim 15
Dependent Claim 36 words
An accumulator as recited in claim 11 and further comprising means to subtract the number stored in the second stage from the contents of the first stage with the result being stored in the first stage.
Claim 16
Dependent Claim 50 words
An accumulator as recited in claim 13 and further comprising means operable when the number stored in the second stage is added or subtracted from the contents of the first stage to shift the binary numbers stored in the third through nth stages to the second through (n-1)th stages respectively.
Claim 17
Dependent Claim 57 words
A computer as recited in claim 1 wherein said stages of said accumulator each comprise a plurality of orders each capable of storing a binary digit, each of said orders comprising a bistable storage unit having first and second stable states and storing binary ones and zeros by being in said first and second stable states respectively.
Claim 18
Dependent Claim 224 words
An accumulator comprising first through nth stages each capable of storing a binary number, means to transfer binary numbers from a source to and from said first stage, means operable upon the transfer of a binary number from the first stage to shift the binary numbers, if any, stored in the second through nth stages to the first through (n-1)th stages respectively and operable when a binary number is being transferred to the first stage to shift the binary numbers, if any, stored in the first through (n-1)th stages to the second through nth stages respectively, and means selectively operable in a first mode to add the binary number in said second stage to the contents of said first stage and to store the results of the addition in said first stage and selectively operable in a second mode to receive signals representing any selected binary number from said source and to selectively add or subtract said selected binary number directly to or from the binary number in said first stage and to store the results of the addition in said first stage, and means operable upon adding in said first mode the number stored in said second stage to the contents of said first stage to shift the number stored in the third through nth stages to the second through (n-1)th stages respectively.
Claim 19
Dependent Claim 224 words
An accumulator comprising first through nth stages each capable of storing a binary number, means to transfer binary numbers from a source to and from said first stage, means operable upon the transfer of a binary number from the first stage to shift the binary numbers, if any, stored in the second through nth stages to the first through (n-1)th stages respectively and operable when a binary number is being transferred to the first stage to shift the binary numbers, if any, stored in the first through (n-1)th stages to the second through nth stages respectively, and means selectively operable in a first mode to add the binary number in said second stage to the contents of said first stage and to store the results of the addition in said first stage and selectively operable in a second mode to receive signals representing any selected binary number from said source and to selectively add or subtract said selected binary number directly to or from the binary number in said first stage and to store the results of the addition in said first stage, and means operable upon adding in said first mode the number stored in said second stage to the contents of said first stage to shift the number stored in the third through nth stages to the second through (n-1)th stages respectively.

References Cited (Backward Citations)

US3234524A Cited
US3328763A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-02-15 1974-08-17 1975-02-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-02-15 1978-08-17 1979-02-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-02-15 1982-08-17 1983-02-16 $7700.00 Window Closed / Lapsed

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