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US3558987A Expired / Lapsed US ⏱️ 0.0 years remaining

Overheating protection circuit for a power transistor

Assignee: Subscription Television Inc
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Filing: 1968-11-08
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Granted: 1971-01-26
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Expires: 1988-11-08
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Abstract

Abstract There is described an arrangement in which a power transistor chip is mounted on the end of a mounting stud together with a control transistor chip. The change in the base-to-emitter voltage drop of the control transistor chip with increase in temperature is used to operate a control circuit for turning off the power transistor with any overheating of the power transistor and associated mounting stud.

Inventors

  • 👤 Edward E Lewis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 18:08
CPC Classifications
H; H02; H02H; H02H5/00; H02H5/04; H02H5/044; H02H7/00; H02H7/20; H02H7/205

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 244 words
A thermal protection circuit for a power transistor comprising a temperature-sensitive control transistor in which the base-to-emitter junction voltage decreases with increase in temperature, a thermal-conductive mounting stud adapted to be secured to a heat sink, the power transistor and control transistor each including a semiconductor element secured to the mounting stud, a bias circuit for applying a bias voltage between the base and emitter of the control transistor, the bias voltage normally being slightly less than the base-to-emitter voltage drop in the desired temperature operating range of the control transistor when the power transistor is conducting current to a load, a second transistor coupled to the output of the control transistor, the second transistor being turned on when the control transistor is turned off, a feedback resistor connecting the collector of the second transistor to the base of the control transistor for increasing the base current in the control transistor as the second transistor is turned off, and a bias control circuit for the power transistor including an oscillator, a rectifier and means coupling the alternating current signal from the output of the oscillator to the rectifier, the rectifier providing a direct current bias to the power transistor to turn the power transistor on, a transistor switch responsive to a control signal for turning the oscillator on in response to a control signal, and means coupled to the second transistor for biasing off the transistor switch when the second transistor is turned off.
Claim 2
Dependent Claim 244 words
A thermal protection circuit for a power transistor comprising a temperature-sensitive control transistor in which the base-to-emitter junction voltage decreases with increase in temperature, a thermal-conductive mounting stud adapted to be secured to a heat sink, the power transistor and control transistor each including a semiconductor element secured to the mounting stud, a bias circuit for applying a bias voltage between the base and emitter of the control transistor, the bias voltage normally being slightly less than the base-to-emitter voltage drop in the desired temperature operating range of the control transistor when the power transistor is conducting current to a load, a second transistor coupled to the output of the control transistor, the second transistor being turned on when the control transistor is turned off, a feedback resistor connecting the collector of the second transistor to the base of the control transistor for increasing the base current in the control transistor as the second transistor is turned off, and a bias control circuit for the power transistor including an oscillator, a rectifier and means coupling the alternating current signal from the output of the oscillator to the rectifier, the rectifier providing a direct current bias to the power transistor to turn the power transistor on, a transistor switch responsive to a control signal for turning the oscillator on in response to a control signal, and means coupled to the second transistor for biasing off the transistor switch when the second transistor is turned off.

References Cited (Backward Citations)

US3363060A Cited
US3411049A Cited
US3373318A Cited
US3436564A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-01-25 1974-07-27 1975-01-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-01-25 1978-07-27 1979-01-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-01-25 1982-07-27 1983-01-26 $7700.00 Window Closed / Lapsed

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