Current limiting protective means

Claim 2

Overcurrent protective means comprising: a. a main circuit comprising solid-state-controlled switching means which is normally maintained in a relatively low resistance state whereby electric current can easily traverse said main circuit; b. means for serially connecting said main circuit in a load current conducting path between a source of electric power and an electric power load circuit; c. said main circuit being shunted by the combination of another switching means in series with load current limiting impedance means; d. means operative in immediate response to a condition of abnormally high current in said path for causing said controlled switching means to change from its low resistance, turned on state to a high resistance, turned-off state, whereupon load current is forced to traverse said impedance means; and e. means operative in delayed response to said abnormally high current condition for causing said other switching means to turn off, thereby interrupting current through said impedance means, unless said abnormal condition has earlier terminated.

Claim 3

The protective means of claim 1 including means for causing said controlled switching means to resume its normal low resistance state in response to the termination of said abnormal condition prior to the operation of the means for turning off said other switching means.

Claim 4

The protective means of claim 1 in which the means for turning off said controlled switching means comprises commutating means for quenching current in said controlled switching means in high-speed response to the occurrence of said abnormally highcurrent condition.

Claim 5

The protective means of claim 1 including means for causing said controlled switching means to resume its normal low resistance state in response to the termination of said abnormal condition prior to the operation of the means for turning off said other switching means.

Claim 6

The protective means of claim 1 in which the means for turning off said controlled switching means comprises commutating means for quenching current in said controlled switching means in high-speed response to the occurrence of said abnormally high-current condition.

Claim 7

The protective means of claim 3 in which said other switching means comprises additional solid-state-controlled switching means which is turned on by the operation of an associated firing signal generator when said first-mentioned controlled switching means is turned off, and in which the means for turning off said other switching means comprises means for deactivating said generator in response to said abnormally high-current condition continuing for a predetermined length of time.

Claim 8

The protective means of claim 1 in which said path conducts alternating current and both of said switching means exhibit bidirectional conducting capabilities.

Claim 9

The protective means of claim 5 in which said solid-state control switching means comprises a pair of thyristors connected in inverse parallel relationship with one another.

Claim 10

The protective means of claim 6 in which said other switching means comprises an additional pair of thyristors connected in inverse parallel relationship with one another.

Claim 11

In combination: a. a main circuit comprising solid-state-controlled switching means which is normally maintained in a relatively low resistance, turned-on state, whereby electric current can easily traverse said main circuit; b. means for serially connecting said main circuit in a load current conducting path between a source of electric power and an electric power load circuit; c. said main circuit being shunted by the combination of another switching means in series with load current limiting impedance means; d. commutating means operative in high-speed response to a first command for quenching current in said controlled switching means, whereupon said controlled switching means abruptly changes from its low resistance state to a high resistance, turned-off state which forces current to traverse said impedance means; and e. means operative in response to a second command issued after said first command for causing said other switching means to turn off, thereby interrupting current through said impedance means.

Claim 12

In combination: a. a main circuit comprising solid-state-controlled switching means which is normally maintained in a relatively low resistance, turned-on state, whereby electric current can easily traverse said main circuit; b. means for serially connecting said main circuit in a load current conducting path between a source of electric power and an electric power load circuit; c. said main circuit being shunted by the combination of another switching means in series with load current limiting impedance means; d. commutating means operative in high-speed response to a first command for quenching current in said controlled switching means, whereupon said controlled switching means abruptly changes from its low resistance state to a high resistance, turned-off state which forces current to traverse said impedance means; and e. means operative in response to a second command issued after said first command for causing said other switching means to turn off, thereby interrupting current through said impedance means.

Claim 13

In combination: a. a main circuit comprising first solid-state-controlled switching means; b. first control means operative when enabled for triggering said first switching means which consequently can assume a relatively low resistance, turned-on state whereby electric current can easily traverse said main circuit; c. said main circuit shunted by the combination of second solid-state-controlled switching means in series with current-limiting impedance means; d. second control means operative when activated for triggering said second switching means which consequently can assume a relatively low resistance, turned-on state, thereby effectively connecting said impedance means in parallel with said main circuit; e. means for serially connecting said main circuit in a load current conducting path between a source of electric power and an electric power load circuit; f. means responsive to a closing command for immediately activating said second control means and for subsequently enabling said first control means; g. commutating means operative when triggered for quenching current in said first switching means which consequently can assume a high resistance, turned-off state; and h. means responsive to an impedance-inserting command for substantially simultaneously: i. triggering said commutating means; ii. activating said second control means; and iii. disabling said first control means.

Claim 14

In combination: a. a main circuit comprising first solid-state-controlled switching means; b. first control means operative when enabled for triggering said first switching means which consequently can assume a relatively low resistance, turned-on state whereby electric current can easily traverse said main circuit; c. said main circuit shunted by the combination of second solid-state-controlled switching means in series with current-limiting impedance means; d. second control means operative when activated for triggering said second switching means which consequently can assume a relatively low resistance, turned-on state, thereby effectively connecting said impedance means in parallel with said main circuit; e. means for serially connecting said main circuit in a load current conducting path between a source of electric power and an electric power load circuit; f. means responsive to a closing command for immediately activating said second control means and for subsequently enabling said first control means; g. commutating means operative when triggered for quenching current in said first switching means which consequently can assume a high resistance, turned-off state; and h. means responsive to an impedance-inserting command for substantially simultaneously: i. triggering said commutating means; ii. activating said second control means; and iii. disabling said first control means.

Claim 15

Overcurrent protective means comprising: a. a main circuit comprising solid-state-controlled switching means which is normally maintained in a relatively low resistance state whereby electric current can easily traverse said main circuit; b. means for serially connecting said main circuit in a load current conducting path between a source of electric power and an electric power load circuit; c. said main circuit being shunted by the combination of another switching means in series with load current-limiting impedance means; and d. commutating means connected to said controlled switching means for causing said controlled switching means to change from its low resistance state to a high resistance, essentially nonconductive state, in high-speed response to the occurrence of an abnormally high-current condition, whereupon load current is forced to traverse said impedance means.

Claim 16

Overcurrent protective means comprising: a. a main circuit comprising solid-state-controlled switching means which is normally maintained in a relatively low resistance state whereby electric current can easily traverse said main circuit; b. means for serially connecting said main circuit in a load current conducting path between a source of electric power and an electric power load circuit; c. said main circuit being shunted by the combination of another switching means in series with load current-limiting impedance means; and d. commutating means connected to said controlled switching means for causing said controlled switching means to change from its low resistance state to a high resistance, essentially nonconductive state, in high-speed response to the occurrence of an abnormally high-current condition, whereupon load current is forced to traverse said impedance means.

Claim 17

In combination: a. a main circuit comprising first solid-state-controlled switching means; b. first control means operative when enabled for triggering said first switching means which consequently can assume a relatively low resistance, turned-on state whereby electric current can easily traverse said main circuit; c. said main circuit being shunted by the combination of second solid-state-controlled controlled switching means in series with current-limiting impedance means; d. second control means operative when activated for triggering said second switching means which consequently can assume a relatively low resistance, turned-on state, thereby effectively connecting said impedance means in parallel with said main circuit; e. means for serially connecting said main circuit in a load current conducting path between a source of electric power and an electric power load circuit; f. means responsive to a closing command for immediately activating said second control means and for subsequently enabling said first control means; g. commutating means operative when triggered for quenching current in said first switching means which consequently can assume a high resistance, turned-off state; and h. means responsive to an impedance-inserting command for substantially simultaneously triggering said commutating means and disabling said first control means, said last-mentioned means being arranged to enable said first control means to resume triggering said first switching means in response to the termination of said impedance-inserting command.

Claim 18

In combination: a. a main circuit comprising first solid-state-controlled switching means; b. first control means operative when enabled for triggering said first switching means which consequently can assume a relatively low resistance, turned-on state whereby electric current can easily traverse said main circuit; c. said main circuit being shunted by the combination of second solid-state-controlled controlled switching means in series with current-limiting impedance means; d. second control means operative when activated for triggering said second switching means which consequently can assume a relatively low resistance, turned-on state, thereby effectively connecting said impedance means in parallel with said main circuit; e. means for serially connecting said main circuit in a load current conducting path between a source of electric power and an electric power load circuit; f. means responsive to a closing command for immediately activating said second control means and for subsequently enabling said first control means; g. commutating means operative when triggered for quenching current in said first switching means which consequently can assume a high resistance, turned-off state; and h. means responsive to an impedance-inserting command for substantially simultaneously triggering said commutating means and disabling said first control means, said last-mentioned means being arranged to enable said first control means to resume triggering said first switching means in response to the termination of said impedance-inserting command.

Claim 19

The combination set forth in claim 11 including means responsive to an opening command issued while said impedance-inserting command subsists for deactivating said second control means which consequently stops triggering said second switching means.