Patent JPH0456566A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3555294A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistor-transistor logic circuits having improved voltage transfer characteristic

Assignee: Motorola Solutions Inc
•
Filing: 1967-02-28
•
Granted: 1971-01-12
•
Expires: 1987-02-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Transistor-transistor logic (TTL) circuitry having a bypass network connected to the output device of the circuitry for providing turnoff drive for the output device. The bypass network includes a resistor connected in series with at least one PN junction, and such PN junction is within either a simple diode or a transistor. The bypass network prevents undesirable spiking in the output signal of the TTL logic circuitry.

Inventors

  • 👤 Ronald L Treadway

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 22:36
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/088

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 159 words
In a logic circuit having an input transistor for receiving one or more binary logic signals, an output transistor, and a current drive transistor connected between the input transistor and the output transistor for providing turn on drive current for the output transistor when binary logic signals concurrently applied to the input transistor reach a predetermined logical level, the improvement comprising discharge circuit means including: a. a turnoff drive transistor having an emitter, a base and a collector; b. a first resistor connected between said collector of said turnoff drive transistor and the base of the output transistor; c. a second resistor connected between the base of said turnoff drive transistor and the base of the output transistor; and d. means connecting the emitter of said turnoff drive transistor to a point of reference potential, said turnoff drive transistor and said first and second resistors providing a discharge path from the output transistor when the latter is turned off.
Claim 2
Dependent Claim 159 words
In a logic circuit having an input transistor for receiving one or more binary logic signals, an output transistor, and a current drive transistor connected between the input transistor and the output transistor for providing turn on drive current for the output transistor when binary logic signals concurrently applied to the input transistor reach a predetermined logical level, the improvement comprising discharge circuit means including: a. a turnoff drive transistor having an emitter, a base and a collector; b. a first resistor connected between said collector of said turnoff drive transistor and the base of the output transistor; c. a second resistor connected between the base of said turnoff drive transistor and the base of the output transistor; and d. means connecting the emitter of said turnoff drive transistor to a point of reference potential, said turnoff drive transistor and said first and second resistors providing a discharge path from the output transistor when the latter is turned off.
Claim 3
Dependent Claim 43 words
The circuit according to claim 1 wherein the resistance value of said first resistor is approximately twice that of said second resistor in order that the currents flowing through said first and second resistors to said turnoff drive transistor will be approximately equal.
Claim 4
Dependent Claim 204 words
A transistor-transistor logic circuit including in combination: a. an input transistor having a base, a collector and a plurality of emitters connected to receive binary logic signals; b. one output transistor having an emitter, a base and a collector; c. one current drive transistor having an emitter, a base and a collector with the base-emitter path thereof connected between the collector of said input transistor and the base of said one output transistor, said one current drive transistor providing a turn on drive current for said one output transistor when binary logic signals concurrently applied to the emitters of the input transistor reach a predetermined logical level; d. resistance means connected between a voltage supply terminal and respective ones of said input transistor, said one current drive transistor, and said one output transistor for biasing same and biasing said one output transistor and said one current drive transistor nonconducting in the absence of binary logic signals at a predetermined logic level concurrently applied to the emitters of said input transistor; and e. discharge circuit means including a transistor having its base and collector regions resistively connected to the base of said one output transistor and its emitter connected to a point of reference potential.
Claim 5
Dependent Claim 204 words
A transistor-transistor logic circuit including in combination: a. an input transistor having a base, a collector and a plurality of emitters connected to receive binary logic signals; b. one output transistor having an emitter, a base and a collector; c. one current drive transistor having an emitter, a base and a collector with the base-emitter path thereof connected between the collector of said input transistor and the base of said one output transistor, said one current drive transistor providing a turn on drive current for said one output transistor when binary logic signals concurrently applied to the emitters of the input transistor reach a predetermined logical level; d. resistance means connected between a voltage supply terminal and respective ones of said input transistor, said one current drive transistor, and said one output transistor for biasing same and biasing said one output transistor and said one current drive transistor nonconducting in the absence of binary logic signals at a predetermined logic level concurrently applied to the emitters of said input transistor; and e. discharge circuit means including a transistor having its base and collector regions resistively connected to the base of said one output transistor and its emitter connected to a point of reference potential.
Claim 6
Dependent Claim 66 words
A circuit according to claim 3 which further includes: a. a second output transistor connected in push-pull with said one output transistor; and b. a second current drive transistor coupled to said voltage supply terminal and connected between said one current drive transistor and said second output transistor for providing turn on drive current for said second output transistor when said one output transistor turns off.
Claim 7
Dependent Claim 122 words
The circuit according to claim 4 wherein said discharge circuit means includes: a. a turnoff drive transistor having an emitter region, a base region and a collector region, the emitter region connected to said point of reference potential; b. a first resistor connected between the collector region of said turnoff drive transistor and the base of said one output transistor; and c. a second resistor connected between the base region of said turnoff drive transistor and the base of said one output transistor, said first and second resistors providing a discharge path from the base of said one output transistor and through said turnoff drive transistor for rapidly removing the charge from said one output transistor when the latter is turned off.
Claim 8
Dependent Claim 17 words
The circuit according to claim 5 wherein said first resistor is substantially larger than said second resistor.
Claim 9
Dependent Claim 43 words
The circuit according to claim 6 wherein the resistance value of said first resistor is approximately twice that of said second resistor in order that the currents flowing through said first and second resistors to said turnoff drive transistor will be approximately equal.

References Cited (Backward Citations)

US3119025A Cited
US3192399A Cited
US3311900A Cited
US3229119A Cited
US3243606A Cited
US3265906A Cited
US3436563A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-01-11 1974-07-13 1975-01-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-01-11 1978-07-13 1979-01-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-01-11 1982-07-13 1983-01-12 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag