Patent US4608683A successfully refreshed from Google Patents.
Patent US3553478A successfully refreshed from Google Patents.
US3553478A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulse generator
Assignee: US Philips Corp
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Filing: 1968-01-31
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Granted: 1971-01-05
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Expires: 1988-01-31
Abstract
Abstract A sweep generator in which the forward conduction of an intermittently operated positive feedback path including a transistor and a pentode is maintained by the discharge of a grounded capacitor connected in the base circuit of the transistor. A biased diode is connected between this capacitor and the base terminal of the transistor to block current from flowing through the capacitor in response to an external synchronization signal applied to the base of the transistor.
Inventors
- 👤 Heinz-Dieter Steinbacher
- 👤 Wilhelm Graffenberger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 09:43
CPC Classifications
H; H03; H03K; H03K4/00; H03K4/06; H03K4/08; H03K4/48; H03K4/60; H03K4/69; H03K4/71; H03K3/00; H03K3/02; H03K3/26; H03K3/30; H03K4/72; H04; H04N; H04N5/00; H04N5/04; H04N5/12
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
161 words
A pulse generator circuit arrangement, comprising an amplifier having control and output terminals, means connected to the control terminal of the amplifier for forward biasing the amplifier, means connected intermediate the forward biasing means and the control terminal for delaying the forward biasing of the amplifier for a predetermined time, positive feedback means connected to the output terminal of the amplifier for providing a forward bias sustaining voltage in response to the forward bias condition of the amplifier, a first capacitor connected in series between the feedback means and the control terminal of the amplifier for conveying the sustaining voltage to the amplifier, a second grounded capacitor connected to the control terminal of the amplifier, terminal means for applying external synchronization pulses to the control terminal of the amplifier, and diode means connected intermediate the terminal means and the second capacitor for providing a high impedance path between the second capacitor and the terminal means in response to the synchronization pulses.
Claim 2
Dependent Claim
161 words
A pulse generator circuit arrangement, comprising an amplifier having control and output terminals, means connected to the control terminal of the amplifier for forward biasing the amplifier, means connected intermediate the forward biasing means and the control terminal for delaying the forward biasing of the amplifier for a predetermined time, positive feedback means connected to the output terminal of the amplifier for providing a forward bias sustaining voltage in response to the forward bias condition of the amplifier, a first capacitor connected in series between the feedback means and the control terminal of the amplifier for conveying the sustaining voltage to the amplifier, a second grounded capacitor connected to the control terminal of the amplifier, terminal means for applying external synchronization pulses to the control terminal of the amplifier, and diode means connected intermediate the terminal means and the second capacitor for providing a high impedance path between the second capacitor and the terminal means in response to the synchronization pulses.
Claim 3
Dependent Claim
163 words
A pulse generator circuit arrangement comprising a transistor having base, emitter and collector terminals, the transistor having a forward biassed condition in response to a first voltage level on the base terminal, a first capacitor, a diode connecting one side of the first capacitor to the base terminal of the transistor, means for discharging the capacitor approximately proportional with time towards the first voltage level, whereby the transistor is forward biassed in response to the first voltage level on the first capacitor, pulse providing means responsive to the forward bias condition of the transistor for charging the first capacitor through the diode to a voltage less than the first voltage level whereby the transistor is cut off, and terminal means for applying synchronization pulses having a peak voltage greater than the voltage of the discharging means to the base of the transistor on the side of the diode remote from the first capacitor, thereby forward biassing the transistor and reverse biassing the diode.
Claim 4
Dependent Claim
163 words
A pulse generator circuit arrangement comprising a transistor having base, emitter and collector terminals, the transistor having a forward biassed condition in response to a first voltage level on the base terminal, a first capacitor, a diode connecting one side of the first capacitor to the base terminal of the transistor, means for discharging the capacitor approximately proportional with time towards the first voltage level, whereby the transistor is forward biassed in response to the first voltage level on the first capacitor, pulse providing means responsive to the forward bias condition of the transistor for charging the first capacitor through the diode to a voltage less than the first voltage level whereby the transistor is cut off, and terminal means for applying synchronization pulses having a peak voltage greater than the voltage of the discharging means to the base of the transistor on the side of the diode remote from the first capacitor, thereby forward biassing the transistor and reverse biassing the diode.
Claim 5
Dependent Claim
135 words
A pulse generator as claimed in claim 2, wherein the pulse providing means comprises a pulse source responsive to the forward biassed condition of the transistor for producing a pulse having the polarity necessary for forward biassing the transistor, a second capacitor having one side connected to the base of the transistor and to the side of the diode remote from the first capacitor, and means for connecting the pulse source to the side of the second capacitor remote from the base of the transistor, whereby the second capacitor is charged through the base of the transistor toward a voltage necessary to cut off the transistor, the cutoff voltage from the second capacitor being conducted through the diode to the first capacitor in response to the trailing edge of the pulse from the pulse source.
Claim 6
Dependent Claim
43 words
A pulse generator as claimed in claim 3, wherein the means for discharging the first capacitor comprises means for rectifying the pulses from the pulse source, and means for connecting the rectified pulses to the side of the first capacitor proximate the diode.
Claim 7
Dependent Claim
20 words
A pulse generator as claimed in claim 11, wherein the pulse source is a secondary coil of a flyback transformer.
Claim 8
Dependent Claim
26 words
A pulse generator circuit arrangement as claimed in claim 2, wherein the capacity of the second capacitor is smaller than the capacity of the first capacitor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-01-04 | 1974-07-06 | 1975-01-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-01-04 | 1978-07-06 | 1979-01-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-01-04 | 1982-07-06 | 1983-01-05 | $7700.00 | Window Closed / Lapsed |