Complementary-transistor low-level temperature-stabilized regenerative switch circuit utilizing stabistor inverse bias

Claim 1

A REGENERATIVE SWITCHING CIRCUIT STABILIZED AGAINST TEMPERATURE EFFECTS COMPRISING A FIRST TRANSISTOR HAVING A BASE, AN EMITTER, AND A COLLECTOR ELECTRODE, A FIRST INPUT CIRCUIT MEANS FOR SAID FIRST TRANSISTOR CONNECTED TO APPLY AN INPUT SWITCHING SIGNAL BETWEEN SAID BASE AND EMITTER ELECTRODES, A FIRST OUTPUT CIRCUIT MEANS FOR SAID FIRST TRANSISTOR INCLUDING A FIRST LOAD RESISTOR AND A D.C. POWER SOURCE CONNECTED TO DERIVE AN OUTPUT SIGNAL FROM SAID COLLECTOR ELECTRODE, A SECOND TRANSISTOR COMPLEMENTARY TO SAID FIRST TRANSISTOR AND HAVING A BASE, AN EMITTER, AND A COLLECTOR ELECTRODE, A SECOND INPUT CIRCUIT MEANS CONNECTED ACROSS THE BASE AND EMITTER ELECTRODES OF SAID SECOND TRANSISTOR AND TO THE COLLECTOR ELECTRODE OF SAID FIRST TRANSISTOR TO BE RESPONSIVE TO THE OUTPUT SIGNAL THEREFROM, A SECOND OUTPUT CIRCUIT MEANS FOR SAID SECOND TRANSISTOR INCLUDING A SECOND LOAD RESISTOR CONNECTED TO DERIVE AN OUTPUT SIGNAL FROM THE COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR, A FEEDBACK NETWORK INCLUDING A FEEDBACK RESISTIVE ELEMENT CONNECTING THE COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR TO THE SAID FIRST INPUT CIRCUIT TO MAKE THE SAID FIRST TRANSISTOR RESPONSIVE TO THE OUTPUT SIGNAL FROM SAID SECOND TRANSISTOR THEREBY TO REGENERATIVELY PRODUCE AN OUTPUT VOLTAGE ACROSS SAID SECOND LOAD RESISTOR IN RESPONSE TO THE INPUT SWITCHING SIGNAL AT SAID FIRST INPUT CIRCUIT, AND INVERSE BIASING NETWORKS FOR STABILIZING THE OPERATION OF EACH OF THE SAID TRANSISTORS WITH VARIATIONS IN TEMPERATURE, A SEPARATE ONE OF SAID INVERSE BIASING NETWORKS BEING CONNECTED IN SERIES CIRCUIT RELATION BETWEEN THE BASE AND EMITTER ELECTRODES OF EACH SAID TRANSISTOR AND INCLUDING A RESISTIVE ELEMENT S CONNECTED TO SAID EMITTER ELECTRODE, THE VALUE OF SAID RESISTIVE ELEMENT R BEING PRESELECTED TO MAKE THE TERM DEFINED BY ICL(RR1+RIRB+ RRB) SUBSTANTIALLY EQUAL TO OR SMALLER THAN THE TERM ES (R1+R) AT A GIVEN UPPER OPERATING TEMPERATURE FOR THE SAID TRANSISTOR ASSOCIATED THEREWITH,