Velocity corrected resolver encoding system

Claim 1

THE COMBINATION COMPRISING A TRANSDUCER, MEANS FOR PROVIDING A SINUSOIDAL CARRIER WAVE OF CONSTANT ANGULAR VELOCITY FOR ENERGIZING SAID TRANSDUCER, FIRST AND SECOND OUTPUTS FOR SAID TRANSDUCER, A SHAFT ANGULARLY MOVABLE FOR ADJUSTING SAID TRANSDUCER, SAID SHAFT BEING MOVABLE AT A CONSTANT ANGULAR VELOCITY, SAID TRANSDUCER INCLUDING FIRST MEANS OPERATIVE BY SAID SHAFT TO SUPERIMPOSE THE ANGULAR VELOCITY OF THE SHAFT UPON THE ANGULAR VELOCITY OF SAID SINUSOIDAL CARRIER WAVE, AND SECOND MEANS OPERATIVELY CONNECTED TO SAID FIRST MEANS FOR EFFECTING AT SAID FIRST OUTPUT A FIRST SIDE BAND SINUSOIDAL SIGNAL WAVE OF A FREQUENCY EQUIVALENT TO A SUM OF THE SHAFT VELOCITY AND CARRIER WAVE VELOVITY AND AT SAID SECOND OUTPUT A SECOND SIDE BAND SINUSOIDAL SIGNAL WAVE OF A FREQUENCY EQUIVALENT TO A DIFFERENCE BETWEEN THE SHAFT VELOCITY AND THE CARRIER WAVE VELOCITY, MEANS OPERATIVELY CONNECTED TO SAID FIRST OUTPUT TO MULTIPLY THE FREQUENCY OF SAID FIRST SIDE BAND SIGNAL WAVE BY AN INTEGER SO AS TO PROVIDE A SINUSOIDAL OUTPUT COUNT SIGNAL WAVE, A FIRST ZERO CROSSING DETECTOR OPERATIVELY CONNECTED TO THE FIRST OUTPUT, A SECOND ZERO CROSSING DETECTOR OPERATIVELY CONNECTED TO THE SECAND OUTPUT, A GATE TO CONTROL THE COUNT SIGNAL WAVE, AN ELECTRONIC REGISTER TO COUNT CYCLES OF THE COUNT SIGNAL WAVE, MEANS OPERATIVELY CONNECTING SAID FIRST AND SECOND ZERO CROSSING DETECTORS TO SAID CONTROL GATE SO AS TO RENDER ONE OF SAID ZERO CROSSING DETECTORS EFFECTIVE TO ACTUATE SAID GATE SO AS TO APPLY THE COUNT SIGNAL WAVE TO SAID REGISTER UPON ONE OF SAID SIDE BAND SIGNAL WAVES PASSING THROUGH ZERO, AND THE OTHER OF SAID ZERO CROSSING DETECTORS EFFECTIVE TO ACTUATE SAID GATE SO AS TO TERMINATE THE APPLICATION OF THE COUNT SIGNAL WAVE TO SAID REGISTER UPON THE OTHER OF SAID SIDE BAND SIGNAL WAVES PASSING THROUGH ZERO AND THEREBY TERMINATE THE COUNTING OF THE CYCLES OF THE COUNT SIGNAL WAVE BY SAID REGISTER.