Controllable phase shift circuit

Claim 1

A CONTROLLABLE PHASE SHIFT CIRCUIT FOR USE WITH A RELATIVELY LOW IMPEDANCE LOAD, SAID CIRCUIT COMPRISING: FIRST AND SECOND TERMINALS FOR RECEIVING AN APPLIED, TIME-VARYING VOLTAGE; A THIRD TERMINAL ADAPTED FOR COUPLING WITH SAID LOAD; A FIRST IMPEDANCE ARM COUPLED IN SERIES BETWEEN SAID FIRST AND THIRD TERMINALS; A SECOND IMPEDANCE ARM COUPLED WITH SAID FIRST ARM AND SAID SECOND TERMINAL AND PRESENTING A CURRENT PATH IN SHUNT RELATIONSHIP TO SAID FIRST AND SECOND TERMINALS, SAID ARMS HAVING NET REACTANCES OF OPPOSITE SIGN; VARIABLE IMPEDANCE MEANS COUPLED WITH BOTH OF SAID ARMS; AND MEANS COUPLED WITH SAID VARIABLE IMPEDANCE MEANS FOR OPERATING THE LATTER TO VARY THE IMPEDANCE THEREOF OVER A PHASE CONTROL RANGE WHEREBY, UPON APPLICATION OF SAID VOLTAGE TO SAID FIRST AND SECOND TERMINALS, THE VOLTAGE APPEARING ACROSS SAID THRID AND SECOND TERMINALS IN SHIFTED IN PHASE WITH RESPECT TO THE APPLIED VOLTAGE IN ACCORDANCE WITH THE IMPEDANCE OF SAID VARIABLE IMPEDANCE MEANS, SAID OPERATING MEANS BEING OPERABLE TO RAISE THE IMPEDANCE BETWEEN SAID FIRST ARM AND SAID SECOND TERMINAL WHILE SIMULTANEOUSLY LOWERING THE IMPEDANCE BETWEEN SAID FIRST AND THIRD TERMINALS, WHEREBY TO PREVENT EXCESSIVE CURRENT LOADING OF SAID SECOND ARM.